Lines Matching refs:VOP_REG

30 #define VOP_REG(off, _mask, _shift) \  macro
84 .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
85 .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
86 .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
87 .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
91 .scale_yrgb_x = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 0x0),
92 .scale_yrgb_y = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 16),
100 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
101 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
102 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
103 .act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
104 .dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
105 .dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
106 .yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
107 .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
108 .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
109 .uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
110 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
111 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),
112 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
120 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
121 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
122 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
123 .act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0),
124 .dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0),
125 .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),
126 .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),
127 .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
128 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
129 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
130 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
150 .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
157 .htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
158 .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
159 .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
160 .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
164 .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
169 .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
170 .dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
171 .dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27),
172 .dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11),
173 .dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10),
190 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
191 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
192 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
193 .dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),
194 .dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
195 .yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
196 .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
197 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
198 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
199 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
231 .line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0),
239 .out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16),
240 .dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14),
241 .dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8),
242 .dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7),
243 .dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6),
248 .htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
249 .hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0),
250 .vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
251 .vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0),
255 .rgb_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 1),
256 .rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 2),
257 .rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0),
258 .mipi_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 25),
259 .mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 26),
260 .mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24),
264 .scale_yrgb_x = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
265 .scale_yrgb_y = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
266 .scale_cbcr_x = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
267 .scale_cbcr_y = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
275 .enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0),
276 .format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1),
277 .rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12),
278 .uv_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 15),
279 .act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0),
280 .dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0),
281 .dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0),
282 .yrgb_mst = VOP_REG(PX30_WIN0_YRGB_MST0, 0xffffffff, 0),
283 .uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0),
284 .yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0),
285 .uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16),
286 .alpha_pre_mul = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 2),
287 .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
288 .alpha_en = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 0),
295 .enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0),
296 .format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4),
297 .rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12),
298 .uv_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 15),
299 .dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0),
300 .dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0),
301 .yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0),
302 .yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0),
303 .alpha_pre_mul = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 2),
304 .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
305 .alpha_en = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 0),
312 .gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4),
313 .enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0),
314 .format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5),
315 .rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20),
316 .dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0),
317 .dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0),
318 .yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0),
319 .yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0),
320 .alpha_pre_mul = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 2),
321 .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
322 .alpha_en = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 0),
362 .scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
363 .scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
364 .scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
365 .scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
373 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
374 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4),
375 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19),
376 .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 22),
377 .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),
378 .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),
379 .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),
380 .yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0),
381 .uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),
382 .yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),
383 .uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),
384 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
385 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),
392 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
393 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7),
394 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23),
395 .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 26),
396 .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),
397 .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),
398 .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),
399 .yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0),
400 .uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),
401 .yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),
402 .uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),
403 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
404 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),
411 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
412 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10),
413 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27),
414 .dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),
415 .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
416 .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
417 .yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),
418 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
419 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),
423 .htotal_pw = VOP_REG(RK3066_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
424 .hact_st_end = VOP_REG(RK3066_DSP_HACT_ST_END, 0x1fff1fff, 0),
425 .vtotal_pw = VOP_REG(RK3066_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
426 .vact_st_end = VOP_REG(RK3066_DSP_VACT_ST_END, 0x1fff1fff, 0),
430 .pin_pol = VOP_REG(RK3066_DSP_CTRL0, 0x7, 4),
434 .standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),
435 .out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),
436 .cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),
437 .dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11),
438 .dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10),
439 .dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24),
440 .dither_up = VOP_REG(RK3066_DSP_CTRL0, 0x1, 9),
441 .dsp_lut_en = VOP_REG(RK3066_SYS_CTRL1, 0x1, 31),
442 .data_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 25),
468 .line_flag_num[0] = VOP_REG(RK3066_INT_STATUS, 0xfff, 12),
469 .status = VOP_REG(RK3066_INT_STATUS, 0xf, 0),
470 .enable = VOP_REG(RK3066_INT_STATUS, 0xf, 4),
471 .clear = VOP_REG(RK3066_INT_STATUS, 0xf, 8),
485 .scale_yrgb_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
486 .scale_yrgb_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
487 .scale_cbcr_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
488 .scale_cbcr_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
496 .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0),
497 .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3),
498 .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15),
499 .uv_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 18),
500 .act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0),
501 .dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0),
502 .dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0),
503 .yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0),
504 .uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0),
505 .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0),
506 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),
507 .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0),
508 .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
515 .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1),
516 .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6),
517 .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19),
519 .dsp_info = VOP_REG(RK3188_WIN1_DSP_INFO, 0x07ff07ff, 0),
520 .dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0),
521 .yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0),
522 .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16),
523 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 19),
524 .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 1),
525 .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
529 .htotal_pw = VOP_REG(RK3188_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
530 .hact_st_end = VOP_REG(RK3188_DSP_HACT_ST_END, 0x0fff0fff, 0),
531 .vtotal_pw = VOP_REG(RK3188_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
532 .vact_st_end = VOP_REG(RK3188_DSP_VACT_ST_END, 0x0fff0fff, 0),
536 .pin_pol = VOP_REG(RK3188_DSP_CTRL0, 0xf, 4),
540 .gate_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 31),
541 .standby = VOP_REG(RK3188_SYS_CTRL, 0x1, 30),
542 .out_mode = VOP_REG(RK3188_DSP_CTRL0, 0xf, 0),
543 .cfg_done = VOP_REG(RK3188_REG_CFG_DONE, 0x1, 0),
544 .dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27),
545 .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11),
546 .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10),
547 .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 24),
548 .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9),
549 .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28),
550 .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25),
574 .line_flag_num[0] = VOP_REG(RK3188_INT_STATUS, 0xfff, 12),
575 .status = VOP_REG(RK3188_INT_STATUS, 0xf, 0),
576 .enable = VOP_REG(RK3188_INT_STATUS, 0xf, 4),
577 .clear = VOP_REG(RK3188_INT_STATUS, 0xf, 8),
591 .cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),
592 .cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
593 .cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),
594 .cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),
595 .cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),
596 .yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),
597 .yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),
598 .yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),
599 .yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),
600 .yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),
601 .line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),
602 .cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),
603 .yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),
604 .vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),
605 .vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),
606 .vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),
607 .vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),
608 .bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),
609 .cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),
610 .yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),
611 .lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
616 .scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
617 .scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
618 .scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
619 .scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
627 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
628 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
629 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
630 .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
631 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
632 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
633 .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
634 .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
635 .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
636 .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
637 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
638 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
639 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
640 .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
647 .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),
648 .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
649 .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),
650 .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12),
651 .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0),
652 .dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0),
653 .yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0),
654 .yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0),
655 .src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
656 .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),
660 .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
661 .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
662 .vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
663 .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
664 .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
665 .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
669 .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),
670 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
671 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
672 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
673 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
678 .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
679 .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
680 .dither_down_sel = VOP_REG(RK3288_DSP_CTRL1, 0x1, 4),
681 .dither_down_mode = VOP_REG(RK3288_DSP_CTRL1, 0x1, 3),
682 .dither_down_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 2),
683 .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
684 .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
685 .dsp_lut_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 0),
686 .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
687 .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
688 .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
719 .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
720 .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
721 .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4),
722 .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),
750 .line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
751 .line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
762 .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
763 .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
764 .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
765 .uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15),
766 .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
767 .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),
768 .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),
769 .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),
770 .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),
771 .yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0),
772 .uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0),
773 .yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0),
774 .uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16),
775 .src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
776 .dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0),
777 .channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0),
784 .gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
785 .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
786 .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
787 .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
788 .y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
789 .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
790 .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
791 .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
792 .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
793 .src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
794 .dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),
809 .rgb_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 19),
810 .hdmi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 23),
811 .edp_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 27),
812 .mipi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 31),
813 .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 16),
814 .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 20),
815 .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 24),
816 .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 28),
817 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
818 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
819 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
820 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
824 .global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11),
841 .line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
842 .line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
860 .dp_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 19),
861 .rgb_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 19),
862 .hdmi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 23),
863 .edp_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 27),
864 .mipi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 31),
865 .dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 16),
866 .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 16),
867 .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 20),
868 .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 24),
869 .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 28),
870 .dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
871 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
872 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
873 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
874 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
875 .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
880 .gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
881 .mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
882 .dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
883 .dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
884 .dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
885 .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
886 .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
887 .dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
888 .update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
889 .lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
890 .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
891 .dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
892 .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
898 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
899 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 16),
900 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 0),
901 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 16),
902 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 0),
903 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 16),
904 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 0),
905 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 16),
906 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 16, 0xffff, 0),
907 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 20, 0xffffffff, 0),
908 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 24, 0xffffffff, 0),
909 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 28, 0xffffffff, 0),
917 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1) },
919 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) },
930 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
931 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
932 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
933 .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
934 .x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
935 .y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
936 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
937 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
938 .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
939 .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
940 .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
941 .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
942 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
943 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
944 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
945 .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
965 .rstn = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 3),
966 .enable = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 0),
967 .win_sel = VOP_REG(RK3399_AFBCD0_CTRL, 0x3, 1),
968 .format = VOP_REG(RK3399_AFBCD0_CTRL, 0x1f, 16),
969 .hreg_block_split = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 21),
970 .hdr_ptr = VOP_REG(RK3399_AFBCD0_HDR_PTR, 0xffffffff, 0),
971 .pic_size = VOP_REG(RK3399_AFBCD0_PIC_SIZE, 0xffffffff, 0),
998 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1)},
1035 .htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
1036 .hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
1037 .vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
1038 .vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
1039 .hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
1040 .vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
1044 .rgb_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 19),
1045 .hdmi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 23),
1046 .edp_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 27),
1047 .mipi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 31),
1048 .rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
1049 .hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
1050 .edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
1051 .mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
1052 .rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 16),
1053 .hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 20),
1054 .edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 24),
1055 .mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 28),
1059 .global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
1064 .dither_down_sel = VOP_REG(RK3328_DSP_CTRL1, 0x1, 4),
1065 .dither_down_mode = VOP_REG(RK3328_DSP_CTRL1, 0x1, 3),
1066 .dither_down_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 2),
1067 .pre_dither_down = VOP_REG(RK3328_DSP_CTRL1, 0x1, 1),
1068 .dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
1069 .dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
1070 .out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
1077 .line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
1078 .line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),