239 static void vop2_writel(struct vop2 *vop2, u32 offset, u32 v)  in vop2_writel()  function
787 	vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq);  in vop2_crtc_enable_irq()
788 	vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq);  in vop2_crtc_enable_irq()
795 	vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16);  in vop2_crtc_disable_irq()
844 		vop2_writel(vop2, RK3568_OTP_WIN_EN, 1);  in vop2_enable()
846 	vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN);  in vop2_enable()
855 	vop2_writel(vop2, RK3568_SYS0_INT_CLR,  in vop2_enable()
857 	vop2_writel(vop2, RK3568_SYS0_INT_EN,  in vop2_enable()
859 	vop2_writel(vop2, RK3568_SYS1_INT_CLR,  in vop2_enable()
861 	vop2_writel(vop2, RK3568_SYS1_INT_EN,  in vop2_enable()
1492 	vop2_writel(vop2, RK3568_DSP_IF_EN, die);  in rk3568_set_intf_mux()
1493 	vop2_writel(vop2, RK3568_DSP_IF_POL, dip);  in rk3568_set_intf_mux()
1607 	vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id),  in vop2_crtc_atomic_enable()
1755 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset,  in vop2_setup_cluster_alpha()
1757 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset,  in vop2_setup_cluster_alpha()
1759 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL + offset,  in vop2_setup_cluster_alpha()
1761 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL + offset,  in vop2_setup_cluster_alpha()
1838 		vop2_writel(vop2, RK3568_MIX0_SRC_COLOR_CTRL + offset,  in vop2_setup_alpha()
1840 		vop2_writel(vop2, RK3568_MIX0_DST_COLOR_CTRL + offset,  in vop2_setup_alpha()
1842 		vop2_writel(vop2, RK3568_MIX0_SRC_ALPHA_CTRL + offset,  in vop2_setup_alpha()
1844 		vop2_writel(vop2, RK3568_MIX0_DST_ALPHA_CTRL + offset,  in vop2_setup_alpha()
1858 			vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL,  in vop2_setup_alpha()
1860 			vop2_writel(vop2, RK3568_HDR0_DST_COLOR_CTRL,  in vop2_setup_alpha()
1862 			vop2_writel(vop2, RK3568_HDR0_SRC_ALPHA_CTRL,  in vop2_setup_alpha()
1864 			vop2_writel(vop2, RK3568_HDR0_DST_ALPHA_CTRL,  in vop2_setup_alpha()
1867 			vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, 0);  in vop2_setup_alpha()
1894 	vop2_writel(vop2, RK3568_VP_BG_MIX_CTRL(vp->id),  in vop2_setup_layer_mixer()
1900 	vop2_writel(vop2, RK3568_OVL_CTRL, 0);  in vop2_setup_layer_mixer()
1972 	vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);  in vop2_setup_layer_mixer()
1973 	vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);  in vop2_setup_layer_mixer()
1974 	vop2_writel(vop2, RK3568_OVL_CTRL, RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD);  in vop2_setup_layer_mixer()
2013 	vop2_writel(vop2, RK3568_CLUSTER_DLY_NUM, cdly);  in vop2_setup_dly_for_windows()
2014 	vop2_writel(vop2, RK3568_SMART_DLY_NUM, sdly);  in vop2_setup_dly_for_windows()
2147 		vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs);  in vop2_isr()
2180 	vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]);  in vop2_isr()
2182 	vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]);  in vop2_isr()