Lines Matching refs:vop2
143 struct vop2 *vop2; member
161 struct vop2 *vop2; member
180 struct vop2 { struct
229 static void vop2_lock(struct vop2 *vop2) in vop2_lock() argument
231 mutex_lock(&vop2->vop2_lock); in vop2_lock()
234 static void vop2_unlock(struct vop2 *vop2) in vop2_unlock() argument
236 mutex_unlock(&vop2->vop2_lock); in vop2_unlock()
239 static void vop2_writel(struct vop2 *vop2, u32 offset, u32 v) in vop2_writel() argument
241 regmap_write(vop2->map, offset, v); in vop2_writel()
246 regmap_write(vp->vop2->map, vp->data->offset + offset, v); in vop2_vp_write()
249 static u32 vop2_readl(struct vop2 *vop2, u32 offset) in vop2_readl() argument
253 regmap_read(vop2->map, offset, &val); in vop2_readl()
270 struct vop2 *vop2 = vp->vop2; in vop2_cfg_done() local
272 regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, in vop2_cfg_done()
461 struct vop2 *vop2 = win->vop2; in rockchip_vop2_mod_supported() local
470 drm_err(vop2->drm, "Unsupported format modifier 0x%llx\n", in rockchip_vop2_mod_supported()
603 static void vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, in vop2_setup_scale() argument
643 drm_dbg(vop2->drm, "%s dst_w[%d] should align as 2 pixel\n", in vop2_setup_scale()
785 struct vop2 *vop2 = vp->vop2; in vop2_crtc_enable_irq() local
787 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
788 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
793 struct vop2 *vop2 = vp->vop2; in vop2_crtc_disable_irq() local
795 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16); in vop2_crtc_disable_irq()
798 static int vop2_core_clks_prepare_enable(struct vop2 *vop2) in vop2_core_clks_prepare_enable() argument
802 ret = clk_prepare_enable(vop2->hclk); in vop2_core_clks_prepare_enable()
804 drm_err(vop2->drm, "failed to enable hclk - %d\n", ret); in vop2_core_clks_prepare_enable()
808 ret = clk_prepare_enable(vop2->aclk); in vop2_core_clks_prepare_enable()
810 drm_err(vop2->drm, "failed to enable aclk - %d\n", ret); in vop2_core_clks_prepare_enable()
816 clk_disable_unprepare(vop2->hclk); in vop2_core_clks_prepare_enable()
821 static void vop2_enable(struct vop2 *vop2) in vop2_enable() argument
825 ret = pm_runtime_get_sync(vop2->dev); in vop2_enable()
827 drm_err(vop2->drm, "failed to get pm runtime: %d\n", ret); in vop2_enable()
831 ret = vop2_core_clks_prepare_enable(vop2); in vop2_enable()
833 pm_runtime_put_sync(vop2->dev); in vop2_enable()
837 ret = rockchip_drm_dma_attach_device(vop2->drm, vop2->dev); in vop2_enable()
839 drm_err(vop2->drm, "failed to attach dma mapping, %d\n", ret); in vop2_enable()
843 if (vop2->data->soc_id == 3566) in vop2_enable()
844 vop2_writel(vop2, RK3568_OTP_WIN_EN, 1); in vop2_enable()
846 vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); in vop2_enable()
852 regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL, in vop2_enable()
855 vop2_writel(vop2, RK3568_SYS0_INT_CLR, in vop2_enable()
857 vop2_writel(vop2, RK3568_SYS0_INT_EN, in vop2_enable()
859 vop2_writel(vop2, RK3568_SYS1_INT_CLR, in vop2_enable()
861 vop2_writel(vop2, RK3568_SYS1_INT_EN, in vop2_enable()
865 static void vop2_disable(struct vop2 *vop2) in vop2_disable() argument
867 rockchip_drm_dma_detach_device(vop2->drm, vop2->dev); in vop2_disable()
869 pm_runtime_put_sync(vop2->dev); in vop2_disable()
871 clk_disable_unprepare(vop2->aclk); in vop2_disable()
872 clk_disable_unprepare(vop2->hclk); in vop2_disable()
879 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_disable() local
883 vop2_lock(vop2); in vop2_crtc_atomic_disable()
906 drm_info(vop2->drm, "wait for vp%d dsp_hold timeout\n", vp->id); in vop2_crtc_atomic_disable()
912 vop2->enable_count--; in vop2_crtc_atomic_disable()
914 if (!vop2->enable_count) in vop2_crtc_atomic_disable()
915 vop2_disable(vop2); in vop2_crtc_atomic_disable()
917 vop2_unlock(vop2); in vop2_crtc_atomic_disable()
936 struct vop2 *vop2; in vop2_plane_atomic_check() local
949 vop2 = vp->vop2; in vop2_plane_atomic_check()
950 vop2_data = vop2->data; in vop2_plane_atomic_check()
971 drm_err(vop2->drm, "Invalid size: %dx%d->%dx%d, min size is 4x4\n", in vop2_plane_atomic_check()
980 drm_err(vop2->drm, "Invalid source: %dx%d. max input: %dx%d\n", in vop2_plane_atomic_check()
993 drm_err(vop2->drm, "Invalid Source: Yuv format not support odd xpos\n"); in vop2_plane_atomic_check()
1005 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_disable() local
1007 drm_dbg(vop2->drm, "%s disable\n", win->data->name); in vop2_plane_atomic_disable()
1076 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_update() local
1147 drm_err(vop2->drm, "vp%d %s dest->x1[%d] + dsp_w[%d] exceed mode hdisplay[%d]\n", in vop2_plane_atomic_update()
1158 drm_err(vop2->drm, "vp%d %s dest->y1[%d] + dsp_h[%d] exceed mode vdisplay[%d]\n", in vop2_plane_atomic_update()
1172 drm_err(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n", in vop2_plane_atomic_update()
1179 drm_err(vop2->drm, "vp%d %s actual_w[%d] not 4 pixel aligned\n", in vop2_plane_atomic_update()
1189 drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n", in vop2_plane_atomic_update()
1213 drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n", in vop2_plane_atomic_update()
1281 vop2_setup_scale(vop2, win, actual_w, actual_h, dsp_w, dsp_h, fb->format->format); in vop2_plane_atomic_update()
1427 struct vop2 *vop2 = vp->vop2; in rk3568_set_intf_mux() local
1430 die = vop2_readl(vop2, RK3568_DSP_IF_EN); in rk3568_set_intf_mux()
1431 dip = vop2_readl(vop2, RK3568_DSP_IF_POL); in rk3568_set_intf_mux()
1439 regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16) | BIT(3)); in rk3568_set_intf_mux()
1441 regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16)); in rk3568_set_intf_mux()
1486 drm_err(vop2->drm, "Invalid interface id %d on vp%d\n", id, vp->id); in rk3568_set_intf_mux()
1492 vop2_writel(vop2, RK3568_DSP_IF_EN, die); in rk3568_set_intf_mux()
1493 vop2_writel(vop2, RK3568_DSP_IF_POL, dip); in rk3568_set_intf_mux()
1505 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_enable() local
1506 const struct vop2_data *vop2_data = vop2->data; in vop2_crtc_atomic_enable()
1529 drm_dbg(vop2->drm, "Update mode to %dx%d%s%d, type: %d for vp%d\n", in vop2_crtc_atomic_enable()
1533 vop2_lock(vop2); in vop2_crtc_atomic_enable()
1537 drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n", in vop2_crtc_atomic_enable()
1539 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1543 if (!vop2->enable_count) in vop2_crtc_atomic_enable()
1544 vop2_enable(vop2); in vop2_crtc_atomic_enable()
1546 vop2->enable_count++; in vop2_crtc_atomic_enable()
1607 vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id), in vop2_crtc_atomic_enable()
1629 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1713 static int vop2_find_start_mixer_id_for_vp(struct vop2 *vop2, u8 port_id) in vop2_find_start_mixer_id_for_vp() argument
1720 vp = &vop2->vps[i]; in vop2_find_start_mixer_id_for_vp()
1727 static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_win) in vop2_setup_cluster_alpha() argument
1755 vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset, in vop2_setup_cluster_alpha()
1757 vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset, in vop2_setup_cluster_alpha()
1759 vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL + offset, in vop2_setup_cluster_alpha()
1761 vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL + offset, in vop2_setup_cluster_alpha()
1767 struct vop2 *vop2 = vp->vop2; in vop2_setup_alpha() local
1779 mixer_id = vop2_find_start_mixer_id_for_vp(vop2, vp->id); in vop2_setup_alpha()
1838 vop2_writel(vop2, RK3568_MIX0_SRC_COLOR_CTRL + offset, in vop2_setup_alpha()
1840 vop2_writel(vop2, RK3568_MIX0_DST_COLOR_CTRL + offset, in vop2_setup_alpha()
1842 vop2_writel(vop2, RK3568_MIX0_SRC_ALPHA_CTRL + offset, in vop2_setup_alpha()
1844 vop2_writel(vop2, RK3568_MIX0_DST_ALPHA_CTRL + offset, in vop2_setup_alpha()
1858 vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, in vop2_setup_alpha()
1860 vop2_writel(vop2, RK3568_HDR0_DST_COLOR_CTRL, in vop2_setup_alpha()
1862 vop2_writel(vop2, RK3568_HDR0_SRC_ALPHA_CTRL, in vop2_setup_alpha()
1864 vop2_writel(vop2, RK3568_HDR0_DST_ALPHA_CTRL, in vop2_setup_alpha()
1867 vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, 0); in vop2_setup_alpha()
1874 struct vop2 *vop2 = vp->vop2; in vop2_setup_layer_mixer() local
1885 struct vop2_video_port *vp0 = &vop2->vps[0]; in vop2_setup_layer_mixer()
1886 struct vop2_video_port *vp1 = &vop2->vps[1]; in vop2_setup_layer_mixer()
1887 struct vop2_video_port *vp2 = &vop2->vps[2]; in vop2_setup_layer_mixer()
1894 vop2_writel(vop2, RK3568_VP_BG_MIX_CTRL(vp->id), in vop2_setup_layer_mixer()
1900 vop2_writel(vop2, RK3568_OVL_CTRL, 0); in vop2_setup_layer_mixer()
1901 port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL); in vop2_setup_layer_mixer()
1922 layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); in vop2_setup_layer_mixer()
1926 ofs += vop2->vps[i].nlayers; in vop2_setup_layer_mixer()
1972 vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel); in vop2_setup_layer_mixer()
1973 vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel); in vop2_setup_layer_mixer()
1974 vop2_writel(vop2, RK3568_OVL_CTRL, RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD); in vop2_setup_layer_mixer()
1977 static void vop2_setup_dly_for_windows(struct vop2 *vop2) in vop2_setup_dly_for_windows() argument
1983 for (i = 0; i < vop2->data->win_size; i++) { in vop2_setup_dly_for_windows()
1986 win = &vop2->win[i]; in vop2_setup_dly_for_windows()
2013 vop2_writel(vop2, RK3568_CLUSTER_DLY_NUM, cdly); in vop2_setup_dly_for_windows()
2014 vop2_writel(vop2, RK3568_SMART_DLY_NUM, sdly); in vop2_setup_dly_for_windows()
2021 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_begin() local
2034 vop2_setup_cluster_alpha(vop2, win); in vop2_crtc_atomic_begin()
2042 vop2_setup_dly_for_windows(vop2); in vop2_crtc_atomic_begin()
2128 struct vop2 *vop2 = data; in vop2_isr() local
2129 const struct vop2_data *vop2_data = vop2->data; in vop2_isr()
2138 if (!pm_runtime_get_if_in_use(vop2->dev)) in vop2_isr()
2142 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_isr()
2146 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id)); in vop2_isr()
2147 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs); in vop2_isr()
2158 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE); in vop2_isr()
2172 drm_err_ratelimited(vop2->drm, in vop2_isr()
2179 axi_irqs[0] = vop2_readl(vop2, RK3568_SYS0_INT_STATUS); in vop2_isr()
2180 vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]); in vop2_isr()
2181 axi_irqs[1] = vop2_readl(vop2, RK3568_SYS1_INT_STATUS); in vop2_isr()
2182 vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]); in vop2_isr()
2186 drm_err_ratelimited(vop2->drm, "BUS_ERROR irq err\n"); in vop2_isr()
2191 pm_runtime_put(vop2->dev); in vop2_isr()
2196 static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, in vop2_plane_init() argument
2205 ret = drm_universal_plane_init(vop2->drm, &win->base, possible_crtcs, in vop2_plane_init()
2211 drm_err(vop2->drm, "failed to initialize plane %d\n", ret); in vop2_plane_init()
2224 vop2->registered_num_wins - 1); in vop2_plane_init()
2229 static struct vop2_video_port *find_vp_without_primary(struct vop2 *vop2) in find_vp_without_primary() argument
2233 for (i = 0; i < vop2->data->nr_vps; i++) { in find_vp_without_primary()
2234 struct vop2_video_port *vp = &vop2->vps[i]; in find_vp_without_primary()
2249 static int vop2_create_crtc(struct vop2 *vop2) in vop2_create_crtc() argument
2251 const struct vop2_data *vop2_data = vop2->data; in vop2_create_crtc()
2252 struct drm_device *drm = vop2->drm; in vop2_create_crtc()
2253 struct device *dev = vop2->dev; in vop2_create_crtc()
2266 vp = &vop2->vps[i]; in vop2_create_crtc()
2267 vp->vop2 = vop2; in vop2_create_crtc()
2273 vp->dclk = devm_clk_get(vop2->dev, dclk_name); in vop2_create_crtc()
2275 drm_err(vop2->drm, "failed to get %s\n", dclk_name); in vop2_create_crtc()
2281 drm_dbg(vop2->drm, "%s: No remote for vp%d\n", __func__, i); in vop2_create_crtc()
2288 drm_err(vop2->drm, "no port node found for video_port%d\n", i); in vop2_create_crtc()
2297 for (i = 0; i < vop2->registered_num_wins; i++) { in vop2_create_crtc()
2298 struct vop2_win *win = &vop2->win[i]; in vop2_create_crtc()
2301 if (vop2->data->soc_id == 3566) { in vop2_create_crtc()
2316 vp = find_vp_without_primary(vop2); in vop2_create_crtc()
2330 ret = vop2_plane_init(vop2, win, possible_crtcs); in vop2_create_crtc()
2332 drm_err(vop2->drm, "failed to init plane %s: %d\n", in vop2_create_crtc()
2339 vp = &vop2->vps[i]; in vop2_create_crtc()
2350 drm_err(vop2->drm, "crtc init for video_port%d failed\n", i); in vop2_create_crtc()
2364 for (i = 0; i < vop2->data->nr_vps; i++) { in vop2_create_crtc()
2365 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_create_crtc()
2451 struct vop2 *vop2 = win->vop2; in vop2_cluster_init() local
2464 ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, in vop2_cluster_init()
2535 struct vop2 *vop2 = win->vop2; in vop2_esmart_init() local
2548 ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, in vop2_esmart_init()
2557 static int vop2_win_init(struct vop2 *vop2) in vop2_win_init() argument
2559 const struct vop2_data *vop2_data = vop2->data; in vop2_win_init()
2566 win = &vop2->win[i]; in vop2_win_init()
2571 win->vop2 = vop2; in vop2_win_init()
2580 vop2->registered_num_wins = vop2_data->win_size; in vop2_win_init()
2615 struct vop2 *vop2; in vop2_bind() local
2625 alloc_size = sizeof(*vop2) + sizeof(*vop2->win) * vop2_data->win_size; in vop2_bind()
2626 vop2 = devm_kzalloc(dev, alloc_size, GFP_KERNEL); in vop2_bind()
2627 if (!vop2) in vop2_bind()
2630 vop2->dev = dev; in vop2_bind()
2631 vop2->data = vop2_data; in vop2_bind()
2632 vop2->drm = drm; in vop2_bind()
2634 dev_set_drvdata(dev, vop2); in vop2_bind()
2638 drm_err(vop2->drm, "failed to get vop2 register byname\n"); in vop2_bind()
2642 vop2->regs = devm_ioremap_resource(dev, res); in vop2_bind()
2643 if (IS_ERR(vop2->regs)) in vop2_bind()
2644 return PTR_ERR(vop2->regs); in vop2_bind()
2645 vop2->len = resource_size(res); in vop2_bind()
2647 vop2->map = devm_regmap_init_mmio(dev, vop2->regs, &vop2_regmap_config); in vop2_bind()
2649 ret = vop2_win_init(vop2); in vop2_bind()
2655 vop2->lut_regs = devm_ioremap_resource(dev, res); in vop2_bind()
2656 if (IS_ERR(vop2->lut_regs)) in vop2_bind()
2657 return PTR_ERR(vop2->lut_regs); in vop2_bind()
2660 vop2->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); in vop2_bind()
2662 vop2->hclk = devm_clk_get(vop2->dev, "hclk"); in vop2_bind()
2663 if (IS_ERR(vop2->hclk)) { in vop2_bind()
2664 drm_err(vop2->drm, "failed to get hclk source\n"); in vop2_bind()
2665 return PTR_ERR(vop2->hclk); in vop2_bind()
2668 vop2->aclk = devm_clk_get(vop2->dev, "aclk"); in vop2_bind()
2669 if (IS_ERR(vop2->aclk)) { in vop2_bind()
2670 drm_err(vop2->drm, "failed to get aclk source\n"); in vop2_bind()
2671 return PTR_ERR(vop2->aclk); in vop2_bind()
2674 vop2->irq = platform_get_irq(pdev, 0); in vop2_bind()
2675 if (vop2->irq < 0) { in vop2_bind()
2676 drm_err(vop2->drm, "cannot find irq for vop2\n"); in vop2_bind()
2677 return vop2->irq; in vop2_bind()
2680 mutex_init(&vop2->vop2_lock); in vop2_bind()
2682 ret = devm_request_irq(dev, vop2->irq, vop2_isr, IRQF_SHARED, dev_name(dev), vop2); in vop2_bind()
2686 ret = vop2_create_crtc(vop2); in vop2_bind()
2690 rockchip_drm_dma_init_device(vop2->drm, vop2->dev); in vop2_bind()
2699 struct vop2 *vop2 = dev_get_drvdata(dev); in vop2_unbind() local
2700 struct drm_device *drm = vop2->drm; in vop2_unbind()