Lines Matching refs:polflags
1425 u32 polflags) in rk3568_set_intf_mux() argument
1438 if (polflags & POLFLAG_DCLK_INV) in rk3568_set_intf_mux()
1448 dip |= FIELD_PREP(RK3568_DSP_IF_POL__HDMI_PIN_POL, polflags); in rk3568_set_intf_mux()
1455 dip |= FIELD_PREP(RK3568_DSP_IF_POL__EDP_PIN_POL, polflags); in rk3568_set_intf_mux()
1462 dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags); in rk3568_set_intf_mux()
1469 dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags); in rk3568_set_intf_mux()
1476 dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags); in rk3568_set_intf_mux()
1483 dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags); in rk3568_set_intf_mux()
1525 u32 val, polflags; in vop2_crtc_atomic_enable() local
1550 polflags = 0; in vop2_crtc_atomic_enable()
1552 polflags |= POLFLAG_DCLK_INV; in vop2_crtc_atomic_enable()
1554 polflags |= BIT(HSYNC_POSITIVE); in vop2_crtc_atomic_enable()
1556 polflags |= BIT(VSYNC_POSITIVE); in vop2_crtc_atomic_enable()
1561 rk3568_set_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags); in vop2_crtc_atomic_enable()