1849 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_initialize_powertune_defaults()  local
1853 		si_pi->cac_weights = cac_weights_tahiti;  in si_initialize_powertune_defaults()
1854 		si_pi->lcac_config = lcac_tahiti;  in si_initialize_powertune_defaults()
1855 		si_pi->cac_override = cac_override_tahiti;  in si_initialize_powertune_defaults()
1856 		si_pi->powertune_data = &powertune_data_tahiti;  in si_initialize_powertune_defaults()
1857 		si_pi->dte_data = dte_data_tahiti;  in si_initialize_powertune_defaults()
1861 			si_pi->dte_data.enable_dte_by_default = true;  in si_initialize_powertune_defaults()
1864 			si_pi->dte_data = dte_data_new_zealand;  in si_initialize_powertune_defaults()
1870 			si_pi->dte_data = dte_data_aruba_pro;  in si_initialize_powertune_defaults()
1874 			si_pi->dte_data = dte_data_malta;  in si_initialize_powertune_defaults()
1878 			si_pi->dte_data = dte_data_tahiti_pro;  in si_initialize_powertune_defaults()
1882 			if (si_pi->dte_data.enable_dte_by_default == true)  in si_initialize_powertune_defaults()
1890 			si_pi->cac_weights = cac_weights_pitcairn;  in si_initialize_powertune_defaults()
1891 			si_pi->lcac_config = lcac_pitcairn;  in si_initialize_powertune_defaults()
1892 			si_pi->cac_override = cac_override_pitcairn;  in si_initialize_powertune_defaults()
1893 			si_pi->powertune_data = &powertune_data_pitcairn;  in si_initialize_powertune_defaults()
1894 			si_pi->dte_data = dte_data_curacao_xt;  in si_initialize_powertune_defaults()
1899 			si_pi->cac_weights = cac_weights_pitcairn;  in si_initialize_powertune_defaults()
1900 			si_pi->lcac_config = lcac_pitcairn;  in si_initialize_powertune_defaults()
1901 			si_pi->cac_override = cac_override_pitcairn;  in si_initialize_powertune_defaults()
1902 			si_pi->powertune_data = &powertune_data_pitcairn;  in si_initialize_powertune_defaults()
1903 			si_pi->dte_data = dte_data_curacao_pro;  in si_initialize_powertune_defaults()
1908 			si_pi->cac_weights = cac_weights_pitcairn;  in si_initialize_powertune_defaults()
1909 			si_pi->lcac_config = lcac_pitcairn;  in si_initialize_powertune_defaults()
1910 			si_pi->cac_override = cac_override_pitcairn;  in si_initialize_powertune_defaults()
1911 			si_pi->powertune_data = &powertune_data_pitcairn;  in si_initialize_powertune_defaults()
1912 			si_pi->dte_data = dte_data_neptune_xt;  in si_initialize_powertune_defaults()
1916 			si_pi->cac_weights = cac_weights_pitcairn;  in si_initialize_powertune_defaults()
1917 			si_pi->lcac_config = lcac_pitcairn;  in si_initialize_powertune_defaults()
1918 			si_pi->cac_override = cac_override_pitcairn;  in si_initialize_powertune_defaults()
1919 			si_pi->powertune_data = &powertune_data_pitcairn;  in si_initialize_powertune_defaults()
1920 			si_pi->dte_data = dte_data_pitcairn;  in si_initialize_powertune_defaults()
1924 		si_pi->lcac_config = lcac_cape_verde;  in si_initialize_powertune_defaults()
1925 		si_pi->cac_override = cac_override_cape_verde;  in si_initialize_powertune_defaults()
1926 		si_pi->powertune_data = &powertune_data_cape_verde;  in si_initialize_powertune_defaults()
1933 			si_pi->cac_weights = cac_weights_cape_verde_pro;  in si_initialize_powertune_defaults()
1934 			si_pi->dte_data = dte_data_cape_verde;  in si_initialize_powertune_defaults()
1937 			si_pi->cac_weights = cac_weights_cape_verde_pro;  in si_initialize_powertune_defaults()
1938 			si_pi->dte_data = dte_data_sun_xt;  in si_initialize_powertune_defaults()
1943 			si_pi->cac_weights = cac_weights_heathrow;  in si_initialize_powertune_defaults()
1944 			si_pi->dte_data = dte_data_cape_verde;  in si_initialize_powertune_defaults()
1948 			si_pi->cac_weights = cac_weights_chelsea_xt;  in si_initialize_powertune_defaults()
1949 			si_pi->dte_data = dte_data_cape_verde;  in si_initialize_powertune_defaults()
1952 			si_pi->cac_weights = cac_weights_chelsea_pro;  in si_initialize_powertune_defaults()
1953 			si_pi->dte_data = dte_data_cape_verde;  in si_initialize_powertune_defaults()
1956 			si_pi->cac_weights = cac_weights_heathrow;  in si_initialize_powertune_defaults()
1957 			si_pi->dte_data = dte_data_venus_xtx;  in si_initialize_powertune_defaults()
1960 			si_pi->cac_weights = cac_weights_heathrow;  in si_initialize_powertune_defaults()
1961 			si_pi->dte_data = dte_data_venus_xt;  in si_initialize_powertune_defaults()
1967 			si_pi->cac_weights = cac_weights_chelsea_pro;  in si_initialize_powertune_defaults()
1968 			si_pi->dte_data = dte_data_venus_pro;  in si_initialize_powertune_defaults()
1971 			si_pi->cac_weights = cac_weights_cape_verde;  in si_initialize_powertune_defaults()
1972 			si_pi->dte_data = dte_data_cape_verde;  in si_initialize_powertune_defaults()
1981 			si_pi->cac_weights = cac_weights_mars_pro;  in si_initialize_powertune_defaults()
1982 			si_pi->lcac_config = lcac_mars_pro;  in si_initialize_powertune_defaults()
1983 			si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
1984 			si_pi->powertune_data = &powertune_data_mars_pro;  in si_initialize_powertune_defaults()
1985 			si_pi->dte_data = dte_data_mars_pro;  in si_initialize_powertune_defaults()
1992 			si_pi->cac_weights = cac_weights_mars_xt;  in si_initialize_powertune_defaults()
1993 			si_pi->lcac_config = lcac_mars_pro;  in si_initialize_powertune_defaults()
1994 			si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
1995 			si_pi->powertune_data = &powertune_data_mars_pro;  in si_initialize_powertune_defaults()
1996 			si_pi->dte_data = dte_data_mars_pro;  in si_initialize_powertune_defaults()
2002 			si_pi->cac_weights = cac_weights_oland_pro;  in si_initialize_powertune_defaults()
2003 			si_pi->lcac_config = lcac_mars_pro;  in si_initialize_powertune_defaults()
2004 			si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
2005 			si_pi->powertune_data = &powertune_data_mars_pro;  in si_initialize_powertune_defaults()
2006 			si_pi->dte_data = dte_data_mars_pro;  in si_initialize_powertune_defaults()
2010 			si_pi->cac_weights = cac_weights_oland_xt;  in si_initialize_powertune_defaults()
2011 			si_pi->lcac_config = lcac_mars_pro;  in si_initialize_powertune_defaults()
2012 			si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
2013 			si_pi->powertune_data = &powertune_data_mars_pro;  in si_initialize_powertune_defaults()
2014 			si_pi->dte_data = dte_data_mars_pro;  in si_initialize_powertune_defaults()
2018 			si_pi->cac_weights = cac_weights_oland;  in si_initialize_powertune_defaults()
2019 			si_pi->lcac_config = lcac_oland;  in si_initialize_powertune_defaults()
2020 			si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
2021 			si_pi->powertune_data = &powertune_data_oland;  in si_initialize_powertune_defaults()
2022 			si_pi->dte_data = dte_data_oland;  in si_initialize_powertune_defaults()
2026 		si_pi->cac_weights = cac_weights_hainan;  in si_initialize_powertune_defaults()
2027 		si_pi->lcac_config = lcac_oland;  in si_initialize_powertune_defaults()
2028 		si_pi->cac_override = cac_override_oland;  in si_initialize_powertune_defaults()
2029 		si_pi->powertune_data = &powertune_data_hainan;  in si_initialize_powertune_defaults()
2030 		si_pi->dte_data = dte_data_sun_xt;  in si_initialize_powertune_defaults()
2040 	si_pi->enable_dte = false;  in si_initialize_powertune_defaults()
2042 	if (si_pi->powertune_data->enable_powertune_by_default) {  in si_initialize_powertune_defaults()
2045 		if (si_pi->dte_data.enable_dte_by_default) {  in si_initialize_powertune_defaults()
2046 			si_pi->enable_dte = true;  in si_initialize_powertune_defaults()
2048 				si_update_dte_from_pl2(rdev, &si_pi->dte_data);  in si_initialize_powertune_defaults()
2059 		si_pi->dyn_powertune_data.l2_lta_window_size =  in si_initialize_powertune_defaults()
2060 			si_pi->powertune_data->l2_lta_window_size_default;  in si_initialize_powertune_defaults()
2061 		si_pi->dyn_powertune_data.lts_truncate =  in si_initialize_powertune_defaults()
2062 			si_pi->powertune_data->lts_truncate_default;  in si_initialize_powertune_defaults()
2065 		si_pi->dyn_powertune_data.l2_lta_window_size = 0;  in si_initialize_powertune_defaults()
2066 		si_pi->dyn_powertune_data.lts_truncate = 0;  in si_initialize_powertune_defaults()
2069 	si_pi->dyn_powertune_data.disable_uvd_powertune = false;  in si_initialize_powertune_defaults()
2139 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_smc_tdp_limits()  local
2142 		SISLANDS_SMC_STATETABLE *smc_table = &si_pi->smc_statetable;  in si_populate_smc_tdp_limits()
2171 					   (si_pi->state_table_start + offsetof(SISLANDS_SMC_STATETABLE, dpm2Params) +  in si_populate_smc_tdp_limits()
2175 					   si_pi->sram_end);  in si_populate_smc_tdp_limits()
2179 		if (si_pi->enable_ppm) {  in si_populate_smc_tdp_limits()
2180 			papm_parm = &si_pi->papm_parm;  in si_populate_smc_tdp_limits()
2189 			ret = si_copy_bytes_to_smc(rdev, si_pi->papm_cfg_table_start,  in si_populate_smc_tdp_limits()
2192 						   si_pi->sram_end);  in si_populate_smc_tdp_limits()
2204 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_smc_tdp_limits_2()  local
2207 		SISLANDS_SMC_STATETABLE *smc_table = &si_pi->smc_statetable;  in si_populate_smc_tdp_limits_2()
2219 					   (si_pi->state_table_start +  in si_populate_smc_tdp_limits_2()
2224 					   si_pi->sram_end);  in si_populate_smc_tdp_limits_2()
2257 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_should_disable_uvd_powertune()  local
2259 	if (si_pi->dyn_powertune_data.disable_uvd_powertune &&  in si_should_disable_uvd_powertune()
2449 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_initialize_smc_dte_tables()  local
2451 	struct si_dte_data *dte_data = &si_pi->dte_data;  in si_initialize_smc_dte_tables()
2458 		si_pi->enable_dte = false;  in si_initialize_smc_dte_tables()
2460 	if (si_pi->enable_dte == false)  in si_initialize_smc_dte_tables()
2468 		si_pi->enable_dte = false;  in si_initialize_smc_dte_tables()
2505 	ret = si_copy_bytes_to_smc(rdev, si_pi->dte_table_start, (u8 *)dte_tables,  in si_initialize_smc_dte_tables()
2506 				   sizeof(Smc_SIslands_DTE_Configuration), si_pi->sram_end);  in si_initialize_smc_dte_tables()
2515 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_get_cac_std_voltage_max_min()  local
2535 	if (si_pi->powertune_data->lkge_lut_v0_percent > 100)  in si_get_cac_std_voltage_max_min()
2538 	v0_loadline = (*min) * (100 - si_pi->powertune_data->lkge_lut_v0_percent) / 100;  in si_get_cac_std_voltage_max_min()
2562 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_init_dte_leakage_table()  local
2579 							 &si_pi->powertune_data->leakage_coefficients,  in si_init_dte_leakage_table()
2582 							 si_pi->dyn_powertune_data.cac_leakage,  in si_init_dte_leakage_table()
2601 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_init_simplified_leakage_table()  local
2614 					   &si_pi->powertune_data->leakage_coefficients,  in si_init_simplified_leakage_table()
2615 					   si_pi->powertune_data->fixed_kt,  in si_init_simplified_leakage_table()
2617 					   si_pi->dyn_powertune_data.cac_leakage,  in si_init_simplified_leakage_table()
2635 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_initialize_smc_cac_tables()  local
2651 	reg |= CAC_WINDOW(si_pi->powertune_data->cac_window);  in si_initialize_smc_cac_tables()
2654 	si_pi->dyn_powertune_data.cac_leakage = rdev->pm.dpm.cac_leakage;  in si_initialize_smc_cac_tables()
2655 	si_pi->dyn_powertune_data.dc_pwr_value =  in si_initialize_smc_cac_tables()
2656 		si_pi->powertune_data->dc_cac[NISLANDS_DCCAC_LEVEL_0];  in si_initialize_smc_cac_tables()
2657 	si_pi->dyn_powertune_data.wintime = si_calculate_cac_wintime(rdev);  in si_initialize_smc_cac_tables()
2658 	si_pi->dyn_powertune_data.shift_n = si_pi->powertune_data->shift_n_default;  in si_initialize_smc_cac_tables()
2660 	si_pi->dyn_powertune_data.leakage_minimum_temperature = 80 * 1000;  in si_initialize_smc_cac_tables()
2671 	if (si_pi->enable_dte || ni_pi->driver_calculate_cac_leakage)  in si_initialize_smc_cac_tables()
2683 	cac_tables->l2numWin_TDP = cpu_to_be32(si_pi->dyn_powertune_data.l2_lta_window_size);  in si_initialize_smc_cac_tables()
2684 	cac_tables->lts_truncate_n = si_pi->dyn_powertune_data.lts_truncate;  in si_initialize_smc_cac_tables()
2685 	cac_tables->SHIFT_N = si_pi->dyn_powertune_data.shift_n;  in si_initialize_smc_cac_tables()
2689 	cac_tables->WinTime = cpu_to_be32(si_pi->dyn_powertune_data.wintime);  in si_initialize_smc_cac_tables()
2693 	cac_tables->cac_temp = si_pi->powertune_data->operating_temp;  in si_initialize_smc_cac_tables()
2697 	ret = si_copy_bytes_to_smc(rdev, si_pi->cac_table_start, (u8 *)cac_tables,  in si_initialize_smc_cac_tables()
2698 				   sizeof(PP_SIslands_CacConfig), si_pi->sram_end);  in si_initialize_smc_cac_tables()
2758 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_initialize_hardware_cac_manager()  local
2765 	ret = si_program_cac_config_registers(rdev, si_pi->lcac_config);  in si_initialize_hardware_cac_manager()
2768 	ret = si_program_cac_config_registers(rdev, si_pi->cac_override);  in si_initialize_hardware_cac_manager()
2771 	ret = si_program_cac_config_registers(rdev, si_pi->cac_weights);  in si_initialize_hardware_cac_manager()
2783 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_enable_smc_cac()  local
2804 				if (si_pi->enable_dte) {  in si_enable_smc_cac()
2811 			if (si_pi->enable_dte)  in si_enable_smc_cac()
2828 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_init_smc_spll_table()  local
2838 	if (si_pi->spll_table_start == 0)  in si_init_smc_spll_table()
2884 		ret = si_copy_bytes_to_smc(rdev, si_pi->spll_table_start,  in si_init_smc_spll_table()
2886 					   si_pi->sram_end);  in si_init_smc_spll_table()
2900 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_get_lower_of_leakage_and_vce_voltage()  local
2903 	for (i = 0; i < si_pi->leakage_voltage.count; i++){  in si_get_lower_of_leakage_and_vce_voltage()
2904 		if (highest_leakage < si_pi->leakage_voltage.entries[i].voltage)  in si_get_lower_of_leakage_and_vce_voltage()
2905 			highest_leakage = si_pi->leakage_voltage.entries[i].voltage;  in si_get_lower_of_leakage_and_vce_voltage()
2908 	if (si_pi->leakage_voltage.count && (highest_leakage < vce_voltage))  in si_get_lower_of_leakage_and_vce_voltage()
3167 	struct si_power_info *si_pi = si_get_pi(rdev);
3170 				      si_pi->soft_regs_start + reg_offset, value,
3171 				      si_pi->sram_end);
3178 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_write_smc_soft_register()  local
3181 				       si_pi->soft_regs_start + reg_offset,  in si_write_smc_soft_register()
3182 				       value, si_pi->sram_end);  in si_write_smc_soft_register()
3215 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_get_leakage_vddc()  local
3223 			si_pi->leakage_voltage.entries[count].voltage = vddc;  in si_get_leakage_vddc()
3224 			si_pi->leakage_voltage.entries[count].leakage_index =  in si_get_leakage_vddc()
3229 	si_pi->leakage_voltage.count = count;  in si_get_leakage_vddc()
3235 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_get_leakage_voltage_from_leakage_index()  local
3250 	for (i = 0; i < si_pi->leakage_voltage.count; i++) {  in si_get_leakage_voltage_from_leakage_index()
3251 		if (si_pi->leakage_voltage.entries[i].leakage_index == index) {  in si_get_leakage_voltage_from_leakage_index()
3252 			*leakage_voltage = si_pi->leakage_voltage.entries[i].voltage;  in si_get_leakage_voltage_from_leakage_index()
3460 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_process_firmware_header()  local
3467 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3471 	si_pi->state_table_start = tmp;  in si_process_firmware_header()
3476 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3480 	si_pi->soft_regs_start = tmp;  in si_process_firmware_header()
3485 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3489 	si_pi->mc_reg_table_start = tmp;  in si_process_firmware_header()
3494 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3498 	si_pi->fan_table_start = tmp;  in si_process_firmware_header()
3503 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3507 	si_pi->arb_table_start = tmp;  in si_process_firmware_header()
3512 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3516 	si_pi->cac_table_start = tmp;  in si_process_firmware_header()
3521 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3525 	si_pi->dte_table_start = tmp;  in si_process_firmware_header()
3530 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3534 	si_pi->spll_table_start = tmp;  in si_process_firmware_header()
3539 				     &tmp, si_pi->sram_end);  in si_process_firmware_header()
3543 	si_pi->papm_cfg_table_start = tmp;  in si_process_firmware_header()
3550 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_read_clock_registers()  local
3552 	si_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL);  in si_read_clock_registers()
3553 	si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);  in si_read_clock_registers()
3554 	si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);  in si_read_clock_registers()
3555 	si_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4);  in si_read_clock_registers()
3556 	si_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM);  in si_read_clock_registers()
3557 	si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);  in si_read_clock_registers()
3558 	si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL);  in si_read_clock_registers()
3559 	si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);  in si_read_clock_registers()
3560 	si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);  in si_read_clock_registers()
3561 	si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL);  in si_read_clock_registers()
3562 	si_pi->clock_registers.mpll_func_cntl = RREG32(MPLL_FUNC_CNTL);  in si_read_clock_registers()
3563 	si_pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1);  in si_read_clock_registers()
3564 	si_pi->clock_registers.mpll_func_cntl_2 = RREG32(MPLL_FUNC_CNTL_2);  in si_read_clock_registers()
3565 	si_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1);  in si_read_clock_registers()
3566 	si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2);  in si_read_clock_registers()
3861 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_upload_firmware()  local
3867 	ret = si_load_smc_ucode(rdev, si_pi->sram_end);  in si_upload_firmware()
3941 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_construct_voltage_tables()  local
3954 	} else if (si_pi->voltage_control_svi2) {  in si_construct_voltage_tables()
3975 	if (si_pi->vddci_control_svi2) {  in si_construct_voltage_tables()
3985 						    VOLTAGE_OBJ_GPIO_LUT, &si_pi->mvdd_voltage_table);  in si_construct_voltage_tables()
3992 		if (si_pi->mvdd_voltage_table.count == 0) {  in si_construct_voltage_tables()
3997 		if (si_pi->mvdd_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
4000 								 &si_pi->mvdd_voltage_table);  in si_construct_voltage_tables()
4003 	if (si_pi->vddc_phase_shed_control) {  in si_construct_voltage_tables()
4005 						    VOLTAGE_OBJ_PHASE_LUT, &si_pi->vddc_phase_shed_table);  in si_construct_voltage_tables()
4007 			si_pi->vddc_phase_shed_control = false;  in si_construct_voltage_tables()
4009 		if ((si_pi->vddc_phase_shed_table.count == 0) ||  in si_construct_voltage_tables()
4010 		    (si_pi->vddc_phase_shed_table.count > SISLANDS_MAX_NO_VREG_STEPS))  in si_construct_voltage_tables()
4011 			si_pi->vddc_phase_shed_control = false;  in si_construct_voltage_tables()
4032 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4035 	if (si_pi->voltage_control_svi2) {  in si_populate_smc_voltage_tables()
4037 			si_pi->svc_gpio_id);  in si_populate_smc_voltage_tables()
4039 			si_pi->svd_gpio_id);  in si_populate_smc_voltage_tables()
4064 		if (si_pi->mvdd_voltage_table.count) {  in si_populate_smc_voltage_tables()
4065 			si_populate_smc_voltage_table(rdev, &si_pi->mvdd_voltage_table, table);  in si_populate_smc_voltage_tables()
4068 				cpu_to_be32(si_pi->mvdd_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4071 		if (si_pi->vddc_phase_shed_control) {  in si_populate_smc_voltage_tables()
4072 			if (si_validate_phase_shedding_tables(rdev, &si_pi->vddc_phase_shed_table,  in si_populate_smc_voltage_tables()
4074 				si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);  in si_populate_smc_voltage_tables()
4077 					cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);  in si_populate_smc_voltage_tables()
4080 							   (u32)si_pi->vddc_phase_shed_table.phase_delay);  in si_populate_smc_voltage_tables()
4082 				si_pi->vddc_phase_shed_control = false;  in si_populate_smc_voltage_tables()
4114 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_mvdd_value()  local
4120 			voltage->index = (u8)(si_pi->mvdd_voltage_table.count) - 1;  in si_populate_mvdd_value()
4122 		voltage->value = cpu_to_be16(si_pi->mvdd_voltage_table.entries[voltage->index].value);  in si_populate_mvdd_value()
4209 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_init_arb_table_index()  local
4213 	ret = si_read_smc_sram_dword(rdev, si_pi->arb_table_start, &tmp, si_pi->sram_end);  in si_init_arb_table_index()
4220 	return si_write_smc_sram_dword(rdev, si_pi->arb_table_start,  tmp, si_pi->sram_end);  in si_init_arb_table_index()
4236 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_force_switch_to_arb_f0()  local
4240 	ret = si_read_smc_sram_dword(rdev, si_pi->arb_table_start,  in si_force_switch_to_arb_f0()
4241 				     &tmp, si_pi->sram_end);  in si_force_switch_to_arb_f0()
4302 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_do_program_memory_timing_parameters()  local
4312 					   si_pi->arb_table_start +  in si_do_program_memory_timing_parameters()
4317 					   si_pi->sram_end);  in si_do_program_memory_timing_parameters()
4336 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_initial_mvdd_value()  local
4339 		return si_populate_voltage_value(rdev, &si_pi->mvdd_voltage_table,  in si_populate_initial_mvdd_value()
4340 						 si_pi->mvdd_bootup_value, voltage);  in si_populate_initial_mvdd_value()
4352 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_smc_initial_state()  local
4357 		cpu_to_be32(si_pi->clock_registers.dll_cntl);  in si_populate_smc_initial_state()
4359 		cpu_to_be32(si_pi->clock_registers.mclk_pwrmgt_cntl);  in si_populate_smc_initial_state()
4361 		cpu_to_be32(si_pi->clock_registers.mpll_ad_func_cntl);  in si_populate_smc_initial_state()
4363 		cpu_to_be32(si_pi->clock_registers.mpll_dq_func_cntl);  in si_populate_smc_initial_state()
4365 		cpu_to_be32(si_pi->clock_registers.mpll_func_cntl);  in si_populate_smc_initial_state()
4367 		cpu_to_be32(si_pi->clock_registers.mpll_func_cntl_1);  in si_populate_smc_initial_state()
4369 		cpu_to_be32(si_pi->clock_registers.mpll_func_cntl_2);  in si_populate_smc_initial_state()
4371 		cpu_to_be32(si_pi->clock_registers.mpll_ss1);  in si_populate_smc_initial_state()
4373 		cpu_to_be32(si_pi->clock_registers.mpll_ss2);  in si_populate_smc_initial_state()
4379 		cpu_to_be32(si_pi->clock_registers.cg_spll_func_cntl);  in si_populate_smc_initial_state()
4381 		cpu_to_be32(si_pi->clock_registers.cg_spll_func_cntl_2);  in si_populate_smc_initial_state()
4383 		cpu_to_be32(si_pi->clock_registers.cg_spll_func_cntl_3);  in si_populate_smc_initial_state()
4385 		cpu_to_be32(si_pi->clock_registers.cg_spll_func_cntl_4);  in si_populate_smc_initial_state()
4387 		cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum);  in si_populate_smc_initial_state()
4389 		cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum_2);  in si_populate_smc_initial_state()
4421 	if (si_pi->vddc_phase_shed_control)  in si_populate_smc_initial_state()
4436 	table->initialState.level.gen2PCIE = (u8)si_pi->boot_pcie_gen;  in si_populate_smc_initial_state()
4473 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4474 	u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl;  in si_populate_smc_acpi_state()
4475 	u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2;  in si_populate_smc_acpi_state()
4476 	u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3;  in si_populate_smc_acpi_state()
4477 	u32 spll_func_cntl_4 = si_pi->clock_registers.cg_spll_func_cntl_4;  in si_populate_smc_acpi_state()
4478 	u32 dll_cntl = si_pi->clock_registers.dll_cntl;  in si_populate_smc_acpi_state()
4479 	u32 mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl;  in si_populate_smc_acpi_state()
4480 	u32 mpll_ad_func_cntl = si_pi->clock_registers.mpll_ad_func_cntl;  in si_populate_smc_acpi_state()
4481 	u32 mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl;  in si_populate_smc_acpi_state()
4482 	u32 mpll_func_cntl = si_pi->clock_registers.mpll_func_cntl;  in si_populate_smc_acpi_state()
4483 	u32 mpll_func_cntl_1 = si_pi->clock_registers.mpll_func_cntl_1;  in si_populate_smc_acpi_state()
4484 	u32 mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;  in si_populate_smc_acpi_state()
4505 		table->ACPIState.level.gen2PCIE = si_pi->acpi_pcie_gen;  in si_populate_smc_acpi_state()
4507 		if (si_pi->vddc_phase_shed_control) {  in si_populate_smc_acpi_state()
4530 										    si_pi->sys_pcie_mask,  in si_populate_smc_acpi_state()
4531 										    si_pi->boot_pcie_gen,  in si_populate_smc_acpi_state()
4534 		if (si_pi->vddc_phase_shed_control)  in si_populate_smc_acpi_state()
4573 		cpu_to_be32(si_pi->clock_registers.mpll_ss1);  in si_populate_smc_acpi_state()
4575 		cpu_to_be32(si_pi->clock_registers.mpll_ss2);  in si_populate_smc_acpi_state()
4613 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_ulv_state()  local
4614 	struct si_ulv_param *ulv = &si_pi->ulv;  in si_populate_ulv_state()
4642 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_program_ulv_memory_timing_parameters()  local
4643 	struct si_ulv_param *ulv = &si_pi->ulv;  in si_program_ulv_memory_timing_parameters()
4656 				   si_pi->arb_table_start +  in si_program_ulv_memory_timing_parameters()
4661 				   si_pi->sram_end);  in si_program_ulv_memory_timing_parameters()
4676 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_init_smc_table()  local
4678 	const struct si_ulv_param *ulv = &si_pi->ulv;  in si_init_smc_table()
4679 	SISLANDS_SMC_STATETABLE  *table = &si_pi->smc_statetable;  in si_init_smc_table()
4758 	return si_copy_bytes_to_smc(rdev, si_pi->state_table_start,  in si_init_smc_table()
4760 				    si_pi->sram_end);  in si_init_smc_table()
4768 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_calculate_sclk_params()  local
4770 	u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl;  in si_calculate_sclk_params()
4771 	u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2;  in si_calculate_sclk_params()
4772 	u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3;  in si_calculate_sclk_params()
4773 	u32 spll_func_cntl_4 = si_pi->clock_registers.cg_spll_func_cntl_4;  in si_calculate_sclk_params()
4774 	u32 cg_spll_spread_spectrum = si_pi->clock_registers.cg_spll_spread_spectrum;  in si_calculate_sclk_params()
4775 	u32 cg_spll_spread_spectrum_2 = si_pi->clock_registers.cg_spll_spread_spectrum_2;  in si_calculate_sclk_params()
4862 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_mclk_value()  local
4863 	u32  dll_cntl = si_pi->clock_registers.dll_cntl;  in si_populate_mclk_value()
4864 	u32  mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl;  in si_populate_mclk_value()
4865 	u32  mpll_ad_func_cntl = si_pi->clock_registers.mpll_ad_func_cntl;  in si_populate_mclk_value()
4866 	u32  mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl;  in si_populate_mclk_value()
4867 	u32  mpll_func_cntl = si_pi->clock_registers.mpll_func_cntl;  in si_populate_mclk_value()
4868 	u32  mpll_func_cntl_1 = si_pi->clock_registers.mpll_func_cntl_1;  in si_populate_mclk_value()
4869 	u32  mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;  in si_populate_mclk_value()
4870 	u32  mpll_ss1 = si_pi->clock_registers.mpll_ss1;  in si_populate_mclk_value()
4871 	u32  mpll_ss2 = si_pi->clock_registers.mpll_ss2;  in si_populate_mclk_value()
4964 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_convert_power_level_to_smc()  local
4971 	    (si_pi->force_pcie_gen != RADEON_PCIE_GEN_INVALID))  in si_convert_power_level_to_smc()
4972 		level->gen2PCIE = (u8)si_pi->force_pcie_gen;  in si_convert_power_level_to_smc()
5049 	if (si_pi->vddc_phase_shed_control) {  in si_convert_power_level_to_smc()
5060 	level->MaxPoweredUpCU = si_pi->max_cu;  in si_convert_power_level_to_smc()
5118 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_disable_ulv()  local
5119 	struct si_ulv_param *ulv = &si_pi->ulv;  in si_disable_ulv()
5131 	const struct si_power_info *si_pi = si_get_pi(rdev);  in si_is_state_ulv_compatible()  local
5132 	const struct si_ulv_param *ulv = &si_pi->ulv;  in si_is_state_ulv_compatible()
5159 	const struct si_power_info *si_pi = si_get_pi(rdev);  in si_set_power_state_conditionally_enable_ulv()  local
5160 	const struct si_ulv_param *ulv = &si_pi->ulv;  in si_set_power_state_conditionally_enable_ulv()
5176 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5201 			if ((i == 0) || si_pi->sclk_deep_sleep_above_low) {  in si_convert_power_state_to_smc()
5253 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_upload_sw_state()  local
5256 	u32 address = si_pi->state_table_start +  in si_upload_sw_state()
5258 	SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState;  in si_upload_sw_state()
5269 				   state_size, si_pi->sram_end);  in si_upload_sw_state()
5276 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_upload_ulv_state()  local
5277 	struct si_ulv_param *ulv = &si_pi->ulv;  in si_upload_ulv_state()
5281 		u32 address = si_pi->state_table_start +  in si_upload_ulv_state()
5283 		struct SISLANDS_SMC_SWSTATE_SINGLE *smc_state = &si_pi->smc_statetable.ULVState;  in si_upload_ulv_state()
5291 						   state_size, si_pi->sram_end);  in si_upload_ulv_state()
5515 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_initialize_mc_reg_table()  local
5517 	struct si_mc_reg_table *si_table = &si_pi->mc_reg_table;  in si_initialize_mc_reg_table()
5566 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_mc_reg_addresses()  local
5569 	for (i = 0, j = 0; j < si_pi->mc_reg_table.last; j++) {  in si_populate_mc_reg_addresses()
5570 		if (si_pi->mc_reg_table.valid_flag & (1 << j)) {  in si_populate_mc_reg_addresses()
5574 				cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0);  in si_populate_mc_reg_addresses()
5576 				cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s1);  in si_populate_mc_reg_addresses()
5601 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_convert_mc_reg_table_entry_to_smc()  local
5604 	for (i = 0; i < si_pi->mc_reg_table.num_entries; i++) {  in si_convert_mc_reg_table_entry_to_smc()
5605 		if (pl->mclk <= si_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)  in si_convert_mc_reg_table_entry_to_smc()
5609 	if ((i == si_pi->mc_reg_table.num_entries) && (i > 0))  in si_convert_mc_reg_table_entry_to_smc()
5612 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[i],  in si_convert_mc_reg_table_entry_to_smc()
5613 				mc_reg_table_data, si_pi->mc_reg_table.last,  in si_convert_mc_reg_table_entry_to_smc()
5614 				si_pi->mc_reg_table.valid_flag);  in si_convert_mc_reg_table_entry_to_smc()
5635 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_populate_mc_reg_table()  local
5636 	struct si_ulv_param *ulv = &si_pi->ulv;  in si_populate_mc_reg_table()
5637 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;  in si_populate_mc_reg_table()
5648 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],  in si_populate_mc_reg_table()
5650 				si_pi->mc_reg_table.last,  in si_populate_mc_reg_table()
5651 				si_pi->mc_reg_table.valid_flag);  in si_populate_mc_reg_table()
5657 		si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],  in si_populate_mc_reg_table()
5659 					si_pi->mc_reg_table.last,  in si_populate_mc_reg_table()
5660 					si_pi->mc_reg_table.valid_flag);  in si_populate_mc_reg_table()
5664 	return si_copy_bytes_to_smc(rdev, si_pi->mc_reg_table_start,  in si_populate_mc_reg_table()
5666 				    sizeof(SMC_SIslands_MCRegisters), si_pi->sram_end);  in si_populate_mc_reg_table()
5673 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_upload_mc_reg_table()  local
5674 	u32 address = si_pi->mc_reg_table_start +  in si_upload_mc_reg_table()
5677 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;  in si_upload_mc_reg_table()
5687 				    si_pi->sram_end);  in si_upload_mc_reg_table()
5728 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_request_link_speed_change_before_state_change()  local
5732 	if (si_pi->force_pcie_gen == RADEON_PCIE_GEN_INVALID)  in si_request_link_speed_change_before_state_change()
5735 		current_link_speed = si_pi->force_pcie_gen;  in si_request_link_speed_change_before_state_change()
5737 	si_pi->force_pcie_gen = RADEON_PCIE_GEN_INVALID;  in si_request_link_speed_change_before_state_change()
5738 	si_pi->pspp_notify_required = false;  in si_request_link_speed_change_before_state_change()
5745 			si_pi->force_pcie_gen = RADEON_PCIE_GEN2;  in si_request_link_speed_change_before_state_change()
5755 			si_pi->force_pcie_gen = si_get_current_pcie_speed(rdev);  in si_request_link_speed_change_before_state_change()
5760 			si_pi->pspp_notify_required = true;  in si_request_link_speed_change_before_state_change()
5768 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_notify_link_speed_change_after_state_change()  local
5772 	if (si_pi->pspp_notify_required) {  in si_notify_link_speed_change_after_state_change()
5811 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_set_max_cu_value()  local
5820 			si_pi->max_cu = 10;  in si_set_max_cu_value()
5826 			si_pi->max_cu = 8;  in si_set_max_cu_value()
5834 			si_pi->max_cu = 10;  in si_set_max_cu_value()
5839 			si_pi->max_cu = 8;  in si_set_max_cu_value()
5842 			si_pi->max_cu = 0;  in si_set_max_cu_value()
5846 		si_pi->max_cu = 0;  in si_set_max_cu_value()
5990 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_set_static_mode()  local
5993 	if (si_pi->fan_ctrl_is_in_default_mode) {  in si_fan_ctrl_set_static_mode()
5995 		si_pi->fan_ctrl_default_mode = tmp;  in si_fan_ctrl_set_static_mode()
5997 		si_pi->t_min = tmp;  in si_fan_ctrl_set_static_mode()
5998 		si_pi->fan_ctrl_is_in_default_mode = false;  in si_fan_ctrl_set_static_mode()
6012 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_thermal_setup_fan_table()  local
6021 	if (!si_pi->fan_table_start) {  in si_thermal_setup_fan_table()
6074 				   si_pi->fan_table_start,  in si_thermal_setup_fan_table()
6077 				   si_pi->sram_end);  in si_thermal_setup_fan_table()
6089 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_start_smc_fan_control()  local
6094 		si_pi->fan_is_controlled_by_smc = true;  in si_fan_ctrl_start_smc_fan_control()
6103 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_stop_smc_fan_control()  local
6109 		si_pi->fan_is_controlled_by_smc = false;  in si_fan_ctrl_stop_smc_fan_control()
6144 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_set_fan_speed_percent()  local
6152 	if (si_pi->fan_is_controlled_by_smc)  in si_fan_ctrl_set_fan_speed_percent()
6192 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_get_mode()  local
6195 	if (si_pi->fan_is_controlled_by_smc)  in si_fan_ctrl_get_mode()
6256 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_fan_ctrl_set_default_mode()  local
6259 	if (!si_pi->fan_ctrl_is_in_default_mode) {  in si_fan_ctrl_set_default_mode()
6261 		tmp |= FDO_PWM_MODE(si_pi->fan_ctrl_default_mode);  in si_fan_ctrl_set_default_mode()
6265 		tmp |= TMIN(si_pi->t_min);  in si_fan_ctrl_set_default_mode()
6267 		si_pi->fan_ctrl_is_in_default_mode = true;  in si_fan_ctrl_set_default_mode()
6333 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_dpm_enable()  local
6339 	if (pi->voltage_control || si_pi->voltage_control_svi2)  in si_dpm_enable()
6343 	if (pi->voltage_control || si_pi->voltage_control_svi2) {  in si_dpm_enable()
6718 	struct si_power_info *si_pi = si_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6735 						 si_pi->sys_pcie_mask,  in si_parse_pplib_clock_info()
6736 						 si_pi->boot_pcie_gen,  in si_parse_pplib_clock_info()
6748 		si_pi->acpi_pcie_gen = pl->pcie_gen;  in si_parse_pplib_clock_info()
6754 		si_pi->ulv.supported = false;  in si_parse_pplib_clock_info()
6755 		si_pi->ulv.pl = *pl;  in si_parse_pplib_clock_info()
6756 		si_pi->ulv.one_pcie_lane_in_ulv = false;  in si_parse_pplib_clock_info()
6757 		si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT;  in si_parse_pplib_clock_info()
6758 		si_pi->ulv.cg_ulv_parameter = SISLANDS_CGULVPARAMETER_DFLT;  in si_parse_pplib_clock_info()
6759 		si_pi->ulv.cg_ulv_control = SISLANDS_CGULVCONTROL_DFLT;  in si_parse_pplib_clock_info()
6776 		si_pi->mvdd_bootup_value = mvdd;  in si_parse_pplib_clock_info()
6885 	struct si_power_info *si_pi;  in si_dpm_init()  local
6891 	si_pi = kzalloc(sizeof(struct si_power_info), GFP_KERNEL);  in si_dpm_init()
6892 	if (si_pi == NULL)  in si_dpm_init()
6894 	rdev->pm.dpm.priv = si_pi;  in si_dpm_init()
6895 	ni_pi = &si_pi->ni;  in si_dpm_init()
6902 		si_pi->sys_pcie_mask = 0;  in si_dpm_init()
6905 			si_pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |  in si_dpm_init()
6909 			si_pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |  in si_dpm_init()
6912 			si_pi->sys_pcie_mask = RADEON_PCIE_SPEED_25;  in si_dpm_init()
6914 	si_pi->force_pcie_gen = RADEON_PCIE_GEN_INVALID;  in si_dpm_init()
6915 	si_pi->boot_pcie_gen = si_get_current_pcie_speed(rdev);  in si_dpm_init()
6986 		si_pi->voltage_control_svi2 =  in si_dpm_init()
6989 		if (si_pi->voltage_control_svi2)  in si_dpm_init()
6991 						  &si_pi->svd_gpio_id, &si_pi->svc_gpio_id);  in si_dpm_init()
7002 		si_pi->vddci_control_svi2 =  in si_dpm_init()
7006 	si_pi->vddc_phase_shed_control =  in si_dpm_init()
7019 	si_pi->sclk_deep_sleep_above_low = false;  in si_dpm_init()
7036 	si_pi->sram_end = SMC_RAM_END;  in si_dpm_init()
7054 	si_pi->fan_ctrl_is_in_default_mode = true;  in si_dpm_init()