34  * to the 3D engine (ring buffer, IBs, etc.), but the
46  * @ring: radeon ring pointer
51 			   struct radeon_ring *ring)  in r600_dma_get_rptr()  argument
56 		rptr = rdev->wb.wb[ring->rptr_offs/4];  in r600_dma_get_rptr()
67  * @ring: radeon ring pointer
72 			   struct radeon_ring *ring)  in r600_dma_get_wptr()  argument
81  * @ring: radeon ring pointer
86 		       struct radeon_ring *ring)  in r600_dma_set_wptr()  argument
88 	WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc);  in r600_dma_set_wptr()
108 	rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false;  in r600_dma_stop()
116  * Set up the DMA ring buffer and enable it. (r6xx-evergreen).
121 	struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];  in r600_dma_resume()  local
129 	/* Set ring buffer size in dwords */  in r600_dma_resume()
130 	rb_bufsz = order_base_2(ring->ring_size / 4);  in r600_dma_resume()
137 	/* Initialize the ring buffer's read and write pointers */  in r600_dma_resume()
150 	WREG32(DMA_RB_BASE, ring->gpu_addr >> 8);  in r600_dma_resume()
166 	ring->wptr = 0;  in r600_dma_resume()
167 	WREG32(DMA_RB_WPTR, ring->wptr << 2);  in r600_dma_resume()
171 	ring->ready = true;  in r600_dma_resume()
173 	r = radeon_ring_test(rdev, R600_RING_TYPE_DMA_INDEX, ring);  in r600_dma_resume()
175 		ring->ready = false;  in r600_dma_resume()
190  * Stop the async dma engine and free the ring (r6xx-evergreen).
195 	radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]);  in r600_dma_fini()
202  * @ring: radeon_ring structure holding ring information
207 bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)  in r600_dma_is_lockup()  argument
212 		radeon_ring_lockup_update(rdev, ring);  in r600_dma_is_lockup()
215 	return radeon_ring_test_lockup(rdev, ring);  in r600_dma_is_lockup()
223  * @ring: radeon_ring structure holding ring information
230 		       struct radeon_ring *ring)  in r600_dma_ring_test()  argument
238 	if (ring->idx == R600_RING_TYPE_DMA_INDEX)  in r600_dma_ring_test()
248 	r = radeon_ring_lock(rdev, ring, 4);  in r600_dma_ring_test()
250 		DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r);  in r600_dma_ring_test()
253 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1));  in r600_dma_ring_test()
254 	radeon_ring_write(ring, lower_32_bits(gpu_addr));  in r600_dma_ring_test()
255 	radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff);  in r600_dma_ring_test()
256 	radeon_ring_write(ring, 0xDEADBEEF);  in r600_dma_ring_test()
257 	radeon_ring_unlock_commit(rdev, ring, false);  in r600_dma_ring_test()
267 		DRM_INFO("ring test on %d succeeded in %d usecs\n", ring->idx, i);  in r600_dma_ring_test()
269 		DRM_ERROR("radeon: ring %d test failed (0x%08X)\n",  in r600_dma_ring_test()
270 			  ring->idx, tmp);  in r600_dma_ring_test()
277  * r600_dma_fence_ring_emit - emit a fence on the DMA ring
282  * Add a DMA fence packet to the ring to write
289 	struct radeon_ring *ring = &rdev->ring[fence->ring];  in r600_dma_fence_ring_emit()  local
290 	u64 addr = rdev->fence_drv[fence->ring].gpu_addr;  in r600_dma_fence_ring_emit()
293 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0, 0));  in r600_dma_fence_ring_emit()
294 	radeon_ring_write(ring, addr & 0xfffffffc);  in r600_dma_fence_ring_emit()
295 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xff));  in r600_dma_fence_ring_emit()
296 	radeon_ring_write(ring, lower_32_bits(fence->seq));  in r600_dma_fence_ring_emit()
298 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0, 0));  in r600_dma_fence_ring_emit()
302  * r600_dma_semaphore_ring_emit - emit a semaphore on the dma ring
305  * @ring: radeon_ring structure holding ring information
309  * Add a DMA semaphore packet to the ring wait on or signal
313 				  struct radeon_ring *ring,  in r600_dma_semaphore_ring_emit()  argument
320 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SEMAPHORE, 0, s, 0));  in r600_dma_semaphore_ring_emit()
321 	radeon_ring_write(ring, addr & 0xfffffffc);  in r600_dma_semaphore_ring_emit()
322 	radeon_ring_write(ring, upper_32_bits(addr) & 0xff);  in r600_dma_semaphore_ring_emit()
331  * @ring: radeon_ring structure holding ring information
333  * Test a simple IB in the DMA ring (r6xx-SI).
336 int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)  in r600_dma_ib_test()  argument
345 	if (ring->idx == R600_RING_TYPE_DMA_INDEX)  in r600_dma_ib_test()
352 	r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);  in r600_dma_ib_test()
387 		DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);  in r600_dma_ib_test()
402  * Schedule an IB in the DMA ring (r6xx-r7xx).
406 	struct radeon_ring *ring = &rdev->ring[ib->ring];  in r600_dma_ring_ib_execute()  local
409 		u32 next_rptr = ring->wptr + 4;  in r600_dma_ring_ib_execute()
413 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1));  in r600_dma_ring_ib_execute()
414 		radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc);  in r600_dma_ring_ib_execute()
415 		radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff);  in r600_dma_ring_ib_execute()
416 		radeon_ring_write(ring, next_rptr);  in r600_dma_ring_ib_execute()
419 	/* The indirect buffer packet must end on an 8 DW boundary in the DMA ring.  in r600_dma_ring_ib_execute()
422 	while ((ring->wptr & 7) != 5)  in r600_dma_ring_ib_execute()
423 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0));  in r600_dma_ring_ib_execute()
424 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_INDIRECT_BUFFER, 0, 0, 0));  in r600_dma_ring_ib_execute()
425 	radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));  in r600_dma_ring_ib_execute()
426 	radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF));  in r600_dma_ring_ib_execute()
451 	struct radeon_ring *ring = &rdev->ring[ring_index];  in r600_copy_dma()  local
460 	r = radeon_ring_lock(rdev, ring, num_loops * 4 + 8);  in r600_copy_dma()
468 	radeon_sync_rings(rdev, &sync, ring->idx);  in r600_copy_dma()
475 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw));  in r600_copy_dma()
476 		radeon_ring_write(ring, dst_offset & 0xfffffffc);  in r600_copy_dma()
477 		radeon_ring_write(ring, src_offset & 0xfffffffc);  in r600_copy_dma()
478 		radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) |  in r600_copy_dma()
484 	r = radeon_fence_emit(rdev, &fence, ring->idx);  in r600_copy_dma()
486 		radeon_ring_unlock_undo(rdev, ring);  in r600_copy_dma()
491 	radeon_ring_unlock_commit(rdev, ring, false);  in r600_copy_dma()