Lines Matching refs:RREG32_PCIE
94 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_tlb_flush()
96 (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_tlb_flush()
179 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_enable()
199 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_disable()
537 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
553 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
555 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
571 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_get_pcie_lanes()
596 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_debugfs_pcie_gart_info_show()
598 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_BASE); in rv370_debugfs_pcie_gart_info_show()
600 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_LO); in rv370_debugfs_pcie_gart_info_show()
602 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_HI); in rv370_debugfs_pcie_gart_info_show()
604 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_LO); in rv370_debugfs_pcie_gart_info_show()
606 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_HI); in rv370_debugfs_pcie_gart_info_show()
608 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_ERROR); in rv370_debugfs_pcie_gart_info_show()