2519 								   pi->dpm_table.sclk_table.dpm_levels[i].value,  in ci_do_program_memory_timing_parameters()
2520 								   pi->dpm_table.mclk_table.dpm_levels[j].value,  in ci_do_program_memory_timing_parameters()
2578 		if (dpm_table->dpm_levels[i-1].enabled)  in ci_get_dpm_level_enable_mask_value()
2596 			(u8)dpm_table->pcie_speed_table.dpm_levels[i].value;  in ci_populate_smc_link_level()
2598 			r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);  in ci_populate_smc_link_level()
3252 						       dpm_table->sclk_table.dpm_levels[i].value,  in ci_populate_all_graphic_levels()
3298 		if (dpm_table->mclk_table.dpm_levels[i].value == 0)  in ci_populate_all_memory_levels()
3301 						      dpm_table->mclk_table.dpm_levels[i].value,  in ci_populate_all_memory_levels()
3343 		dpm_table->dpm_levels[i].enabled = false;  in ci_reset_single_dpm_table()
3349 	dpm_table->dpm_levels[index].value = pcie_gen;  in ci_setup_pcie_table_entry()
3350 	dpm_table->dpm_levels[index].param1 = pcie_lanes;  in ci_setup_pcie_table_entry()
3351 	dpm_table->dpm_levels[index].enabled = true;  in ci_setup_pcie_table_entry()
3443 		    (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3445 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =  in ci_setup_default_dpm_tables()
3447 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3456 		    (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3458 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =  in ci_setup_default_dpm_tables()
3460 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3467 		pi->dpm_table.vddc_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3469 		pi->dpm_table.vddc_table.dpm_levels[i].param1 =  in ci_setup_default_dpm_tables()
3471 		pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3478 			pi->dpm_table.vddci_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3480 			pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3488 			pi->dpm_table.mvdd_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3490 			pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3507 		if (value == table->dpm_levels[i].value) {  in ci_find_boot_level()
3671 		if ((dpm_table->dpm_levels[i].value < low_limit) ||  in ci_trim_single_dpm_states()
3672 		    (dpm_table->dpm_levels[i].value > high_limit))  in ci_trim_single_dpm_states()
3673 			dpm_table->dpm_levels[i].enabled = false;  in ci_trim_single_dpm_states()
3675 			dpm_table->dpm_levels[i].enabled = true;  in ci_trim_single_dpm_states()
3688 		if ((pcie_table->dpm_levels[i].value < speed_low) ||  in ci_trim_pcie_dpm_states()
3689 		    (pcie_table->dpm_levels[i].param1 < lanes_low) ||  in ci_trim_pcie_dpm_states()
3690 		    (pcie_table->dpm_levels[i].value > speed_high) ||  in ci_trim_pcie_dpm_states()
3691 		    (pcie_table->dpm_levels[i].param1 > lanes_high))  in ci_trim_pcie_dpm_states()
3692 			pcie_table->dpm_levels[i].enabled = false;  in ci_trim_pcie_dpm_states()
3694 			pcie_table->dpm_levels[i].enabled = true;  in ci_trim_pcie_dpm_states()
3698 		if (pcie_table->dpm_levels[i].enabled) {  in ci_trim_pcie_dpm_states()
3700 				if (pcie_table->dpm_levels[j].enabled) {  in ci_trim_pcie_dpm_states()
3701 					if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) &&  in ci_trim_pcie_dpm_states()
3702 					    (pcie_table->dpm_levels[i].param1 == pcie_table->dpm_levels[j].param1))  in ci_trim_pcie_dpm_states()
3703 						pcie_table->dpm_levels[j].enabled = false;  in ci_trim_pcie_dpm_states()
3830 		if (sclk == sclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3846 		if (mclk == mclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3872 		dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
3875 		dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
4707 						     pi->dpm_table.mclk_table.dpm_levels[i].value,  in ci_convert_mc_reg_table_to_smc()