41 		if (ret < 0)						\
43 	} while (0)
47 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in sofef00_panel_reset()
51 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in sofef00_panel_reset()
64 	if (ret < 0) {  in sofef00_panel_on()
70 	dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);  in sofef00_panel_on()
73 	if (ret < 0) {  in sofef00_panel_on()
78 	dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);  in sofef00_panel_on()
79 	dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);  in sofef00_panel_on()
80 	dsi_dcs_write_seq(dsi, 0xb0, 0x07);  in sofef00_panel_on()
81 	dsi_dcs_write_seq(dsi, 0xb6, 0x12);  in sofef00_panel_on()
82 	dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);  in sofef00_panel_on()
83 	dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);  in sofef00_panel_on()
84 	dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);  in sofef00_panel_on()
87 	if (ret < 0) {  in sofef00_panel_on()
92 	return 0;  in sofef00_panel_on()
104 	if (ret < 0) {  in sofef00_panel_off()
111 	if (ret < 0) {  in sofef00_panel_off()
117 	return 0;  in sofef00_panel_off()
127 		return 0;  in sofef00_panel_prepare()
130 	if (ret < 0) {  in sofef00_panel_prepare()
138 	if (ret < 0) {  in sofef00_panel_prepare()
145 	return 0;  in sofef00_panel_prepare()
155 		return 0;  in sofef00_panel_unprepare()
158 	if (ret < 0)  in sofef00_panel_unprepare()
164 	return 0;  in sofef00_panel_unprepare()
231 	if (err < 0)  in sofef00_panel_bl_update_status()
234 	return 0;  in sofef00_panel_bl_update_status()
299 	if (ret < 0) {  in sofef00_panel_probe()
305 	return 0;  in sofef00_panel_probe()
314 	if (ret < 0)  in sofef00_panel_remove()