54 	dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
86 static inline void dsi_write_reg(struct dsi_data *dsi,  in dsi_write_reg()  function
426 	dsi_write_reg(dsi, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK);  in omap_dsi_irq_handler()
438 		dsi_write_reg(dsi, DSI_VC_IRQSTATUS(i), vcstatus[i]);  in omap_dsi_irq_handler()
446 		dsi_write_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS, ciostatus);  in omap_dsi_irq_handler()
500 	dsi_write_reg(dsi, status_reg, (mask ^ old_mask) & mask);  in _omap_dsi_configure_irqs()
501 	dsi_write_reg(dsi, enable_reg, mask);  in _omap_dsi_configure_irqs()
1318 	dsi_write_reg(dsi, DSI_COMPLEXIO_CFG1, r);  in dsi_set_lane_config()
1395 	dsi_write_reg(dsi, DSI_DSIPHY_CFG0, r);  in dsi_cio_timings()
1408 	dsi_write_reg(dsi, DSI_DSIPHY_CFG1, r);  in dsi_cio_timings()
1412 	dsi_write_reg(dsi, DSI_DSIPHY_CFG2, r);  in dsi_cio_timings()
1587 	dsi_write_reg(dsi, DSI_TIMING1, l);  in dsi_cio_init()
1671 	dsi_write_reg(dsi, DSI_TX_FIFO_VC_SIZE, r);  in dsi_config_tx_fifo()
1703 	dsi_write_reg(dsi, DSI_RX_FIFO_VC_SIZE, r);  in dsi_config_rx_fifo()
1712 	dsi_write_reg(dsi, DSI_TIMING1, r);  in dsi_force_tx_stop_mode_io()
1885 	dsi_write_reg(dsi, DSI_VC_CTRL(vc), r);  in dsi_vc_initial_config()
2071 	dsi_write_reg(dsi, DSI_VC_LONG_PACKET_HEADER(vc), val);  in dsi_vc_write_long_header()
2084 	dsi_write_reg(dsi, DSI_VC_LONG_PACKET_PAYLOAD(vc), val);  in dsi_vc_write_long_payload()
2173 	dsi_write_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(vc), r);  in dsi_vc_send_short()
2414 	dsi_write_reg(dsi, DSI_TIMING2, r);  in dsi_set_lp_rx_timeout()
2441 	dsi_write_reg(dsi, DSI_TIMING1, r);  in dsi_set_ta_timeout()
2468 	dsi_write_reg(dsi, DSI_TIMING1, r);  in dsi_set_stop_state_counter()
2495 	dsi_write_reg(dsi, DSI_TIMING2, r);  in dsi_set_hs_tx_timeout()
2547 	dsi_write_reg(dsi, DSI_CTRL, r);  in dsi_config_vp_sync_events()
2567 	dsi_write_reg(dsi, DSI_CTRL, r);  in dsi_config_blanking_modes()
2734 	dsi_write_reg(dsi, DSI_VM_TIMING4, r);  in dsi_config_cmd_mode_interleaving()
2740 	dsi_write_reg(dsi, DSI_VM_TIMING5, r);  in dsi_config_cmd_mode_interleaving()
2745 	dsi_write_reg(dsi, DSI_VM_TIMING6, r);  in dsi_config_cmd_mode_interleaving()
2799 	dsi_write_reg(dsi, DSI_CTRL, r);  in dsi_proto_config()
2860 	dsi_write_reg(dsi, DSI_CLK_TIMING, r);  in dsi_proto_timings()
2874 	dsi_write_reg(dsi, DSI_VM_TIMING7, r);  in dsi_proto_timings()
2912 		dsi_write_reg(dsi, DSI_VM_TIMING1, r);  in dsi_proto_timings()
2919 		dsi_write_reg(dsi, DSI_VM_TIMING2, r);  in dsi_proto_timings()
2924 		dsi_write_reg(dsi, DSI_VM_TIMING3, r);  in dsi_proto_timings()
3122 	dsi_write_reg(dsi, DSI_VC_TE(vc), l);  in dsi_update_screen_dispc()
3131 	dsi_write_reg(dsi, DSI_VC_TE(vc), l);  in dsi_update_screen_dispc()