Lines Matching +full:gpio +full:- +full:out +full:- +full:pol
1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/gpio/consumer.h>
78 return dev_get_drvdata(dssdev->dev); in to_dsi_data()
92 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
93 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
94 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
106 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
107 case DSI_PHY: base = dsi->phy_base; break; in dsi_read_reg()
108 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
117 down(&dsi->bus_lock); in dsi_bus_lock()
122 up(&dsi->bus_lock); in dsi_bus_unlock()
127 return dsi->bus_lock.count == 0; in dsi_bus_is_locked()
145 while (t-- > 0) { in wait_for_bit_change()
167 dsi->perf_setup_time = ktime_get(); in dsi_perf_mark_setup()
172 dsi->perf_start_time = ktime_get(); in dsi_perf_mark_start()
186 setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); in dsi_perf_show()
191 trans_time = ktime_sub(t, dsi->perf_start_time); in dsi_perf_show()
198 total_bytes = dsi->update_bytes; in dsi_perf_show()
320 spin_lock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
322 dsi->irq_stats.irq_count++; in dsi_collect_irq_stats()
323 dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); in dsi_collect_irq_stats()
326 dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); in dsi_collect_irq_stats()
328 dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); in dsi_collect_irq_stats()
330 spin_unlock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
346 spin_lock(&dsi->errors_lock); in dsi_handle_irq_errors()
347 dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; in dsi_handle_irq_errors()
348 spin_unlock(&dsi->errors_lock); in dsi_handle_irq_errors()
379 if (isr_data->isr && isr_data->mask & irqstatus) in dsi_call_isrs()
380 isr_data->isr(isr_data->arg, irqstatus); in dsi_call_isrs()
389 dsi_call_isrs(isr_tables->isr_table, in dsi_handle_isrs()
390 ARRAY_SIZE(isr_tables->isr_table), in dsi_handle_isrs()
396 dsi_call_isrs(isr_tables->isr_table_vc[i], in dsi_handle_isrs()
397 ARRAY_SIZE(isr_tables->isr_table_vc[i]), in dsi_handle_isrs()
402 dsi_call_isrs(isr_tables->isr_table_cio, in dsi_handle_isrs()
403 ARRAY_SIZE(isr_tables->isr_table_cio), in dsi_handle_isrs()
413 if (!dsi->is_enabled) in omap_dsi_irq_handler()
416 spin_lock(&dsi->irq_lock); in omap_dsi_irq_handler()
422 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
455 del_timer(&dsi->te_timer); in omap_dsi_irq_handler()
460 memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, in omap_dsi_irq_handler()
461 sizeof(dsi->isr_tables)); in omap_dsi_irq_handler()
463 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
465 dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); in omap_dsi_irq_handler()
474 /* dsi->irq_lock has to be locked by the caller */
492 if (isr_data->isr == NULL) in _omap_dsi_configure_irqs()
495 mask |= isr_data->mask; in _omap_dsi_configure_irqs()
508 /* dsi->irq_lock has to be locked by the caller */
515 _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table, in _omap_dsi_set_irqs()
516 ARRAY_SIZE(dsi->isr_tables.isr_table), mask, in _omap_dsi_set_irqs()
520 /* dsi->irq_lock has to be locked by the caller */
523 _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table_vc[vc], in _omap_dsi_set_irqs_vc()
524 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), in _omap_dsi_set_irqs_vc()
529 /* dsi->irq_lock has to be locked by the caller */
532 _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table_cio, in _omap_dsi_set_irqs_cio()
533 ARRAY_SIZE(dsi->isr_tables.isr_table_cio), in _omap_dsi_set_irqs_cio()
543 spin_lock_irqsave(&dsi->irq_lock, flags); in _dsi_initialize_irq()
545 memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); in _dsi_initialize_irq()
552 spin_unlock_irqrestore(&dsi->irq_lock, flags); in _dsi_initialize_irq()
565 free_idx = -1; in _dsi_register_isr()
569 if (isr_data->isr == isr && isr_data->arg == arg && in _dsi_register_isr()
570 isr_data->mask == mask) { in _dsi_register_isr()
571 return -EINVAL; in _dsi_register_isr()
574 if (isr_data->isr == NULL && free_idx == -1) in _dsi_register_isr()
578 if (free_idx == -1) in _dsi_register_isr()
579 return -EBUSY; in _dsi_register_isr()
582 isr_data->isr = isr; in _dsi_register_isr()
583 isr_data->arg = arg; in _dsi_register_isr()
584 isr_data->mask = mask; in _dsi_register_isr()
597 if (isr_data->isr != isr || isr_data->arg != arg || in _dsi_unregister_isr()
598 isr_data->mask != mask) in _dsi_unregister_isr()
601 isr_data->isr = NULL; in _dsi_unregister_isr()
602 isr_data->arg = NULL; in _dsi_unregister_isr()
603 isr_data->mask = 0; in _dsi_unregister_isr()
608 return -EINVAL; in _dsi_unregister_isr()
617 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr()
619 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_register_isr()
620 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_register_isr()
625 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr()
636 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr()
638 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_unregister_isr()
639 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_unregister_isr()
644 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr()
655 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_vc()
658 dsi->isr_tables.isr_table_vc[vc], in dsi_register_isr_vc()
659 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc])); in dsi_register_isr_vc()
664 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_vc()
675 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
678 dsi->isr_tables.isr_table_vc[vc], in dsi_unregister_isr_vc()
679 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc])); in dsi_unregister_isr_vc()
684 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
694 spin_lock_irqsave(&dsi->errors_lock, flags); in dsi_get_errors()
695 e = dsi->errors; in dsi_get_errors()
696 dsi->errors = 0; in dsi_get_errors()
697 spin_unlock_irqrestore(&dsi->errors_lock, flags); in dsi_get_errors()
707 r = pm_runtime_get_sync(dsi->dev); in dsi_runtime_get()
709 pm_runtime_put_noidle(dsi->dev); in dsi_runtime_get()
721 r = pm_runtime_put_sync(dsi->dev); in dsi_runtime_put()
722 WARN_ON(r < 0 && r != -ENOSYS); in dsi_runtime_put()
734 if (dsi->data->quirks & DSI_QUIRK_REVERSE_TXCLKESC) { in _dsi_print_reset_status()
769 return -EIO; in dsi_if_enable()
777 return dsi->pll.cinfo.clkout[HSDIV_DISPC]; in dsi_get_pll_hsdiv_dispc_rate()
782 return dsi->pll.cinfo.clkout[HSDIV_DSI]; in dsi_get_pll_hsdiv_dsi_rate()
787 return dsi->pll.cinfo.clkdco / 16; in dsi_get_txbyteclkhs()
795 source = dss_get_dsi_clk_source(dsi->dss, dsi->module_id); in dsi_fclk_rate()
798 r = clk_get_rate(dsi->dss_clk); in dsi_fclk_rate()
818 return -EINVAL; in dsi_lp_clock_calc()
820 lp_cinfo->lp_clk_div = lp_clk_div; in dsi_lp_clock_calc()
821 lp_cinfo->lp_clk = lp_clk; in dsi_lp_clock_calc()
831 unsigned int lpdiv_max = dsi->data->max_pll_lpdiv; in dsi_set_lp_clk_divisor()
834 lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; in dsi_set_lp_clk_divisor()
837 return -EINVAL; in dsi_set_lp_clk_divisor()
844 dsi->current_lp_cinfo.lp_clk = lp_clk; in dsi_set_lp_clk_divisor()
845 dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; in dsi_set_lp_clk_divisor()
858 if (dsi->scp_clk_refcount++ == 0) in dsi_enable_scp_clk()
864 WARN_ON(dsi->scp_clk_refcount == 0); in dsi_disable_scp_clk()
865 if (--dsi->scp_clk_refcount == 0) in dsi_disable_scp_clk()
880 /* DSI-PLL power command 0x3 is not working */ in dsi_pll_power()
881 if ((dsi->data->quirks & DSI_QUIRK_PLL_PWR_BUG) && in dsi_pll_power()
893 return -ENODEV; in dsi_pll_power()
907 max_dsi_fck = dsi->data->max_fck_freq; in dsi_pll_calc_dsi_fck()
909 cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck); in dsi_pll_calc_dsi_fck()
910 cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI]; in dsi_pll_calc_dsi_fck()
929 r = regulator_enable(dsi->vdds_dsi_reg); in dsi_pll_enable()
933 /* XXX PLL does not come out of reset without this... */ in dsi_pll_enable()
934 dispc_pck_free_enable(dsi->dss->dispc, 1); in dsi_pll_enable()
937 DSSERR("PLL not coming out of reset.\n"); in dsi_pll_enable()
938 r = -ENODEV; in dsi_pll_enable()
939 dispc_pck_free_enable(dsi->dss->dispc, 0); in dsi_pll_enable()
945 dispc_pck_free_enable(dsi->dss->dispc, 0); in dsi_pll_enable()
956 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_enable()
969 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_disable()
979 struct dsi_data *dsi = s->private; in dsi_dump_dsi_clocks()
980 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; in dsi_dump_dsi_clocks()
982 int dsi_module = dsi->module_id; in dsi_dump_dsi_clocks()
983 struct dss_pll *pll = &dsi->pll; in dsi_dump_dsi_clocks()
985 dispc_clk_src = dss_get_dispc_clk_source(dsi->dss); in dsi_dump_dsi_clocks()
986 dsi_clk_src = dss_get_dsi_clk_source(dsi->dss, dsi_module); in dsi_dump_dsi_clocks()
991 seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); in dsi_dump_dsi_clocks()
993 seq_printf(s, "dsi pll clkin\t%lu\n", clk_get_rate(pll->clkin)); in dsi_dump_dsi_clocks()
995 seq_printf(s, "Fint\t\t%-16lun %u\n", cinfo->fint, cinfo->n); in dsi_dump_dsi_clocks()
997 seq_printf(s, "CLKIN4DDR\t%-16lum %u\n", in dsi_dump_dsi_clocks()
998 cinfo->clkdco, cinfo->m); in dsi_dump_dsi_clocks()
1000 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", in dsi_dump_dsi_clocks()
1004 cinfo->clkout[HSDIV_DISPC], in dsi_dump_dsi_clocks()
1005 cinfo->mX[HSDIV_DISPC], in dsi_dump_dsi_clocks()
1009 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", in dsi_dump_dsi_clocks()
1013 cinfo->clkout[HSDIV_DSI], in dsi_dump_dsi_clocks()
1014 cinfo->mX[HSDIV_DSI], in dsi_dump_dsi_clocks()
1018 seq_printf(s, "- DSI%d -\n", dsi_module + 1); in dsi_dump_dsi_clocks()
1026 cinfo->clkdco / 4); in dsi_dump_dsi_clocks()
1030 seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); in dsi_dump_dsi_clocks()
1040 struct dsi_data *dsi = s->private; in dsi_dump_dsi_irqs()
1044 spin_lock_irqsave(&dsi->irq_stats_lock, flags); in dsi_dump_dsi_irqs()
1046 stats = dsi->irq_stats; in dsi_dump_dsi_irqs()
1047 memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); in dsi_dump_dsi_irqs()
1048 dsi->irq_stats.last_reset = jiffies; in dsi_dump_dsi_irqs()
1050 spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); in dsi_dump_dsi_irqs()
1053 jiffies_to_msecs(jiffies - stats.last_reset)); in dsi_dump_dsi_irqs()
1057 seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]); in dsi_dump_dsi_irqs()
1059 seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); in dsi_dump_dsi_irqs()
1080 seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ in dsi_dump_dsi_irqs()
1081 stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsi_irqs()
1082 stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsi_irqs()
1083 stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsi_irqs()
1084 stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); in dsi_dump_dsi_irqs()
1086 seq_printf(s, "-- VC interrupts --\n"); in dsi_dump_dsi_irqs()
1099 seq_printf(s, "%-20s %10d\n", #x, \ in dsi_dump_dsi_irqs()
1100 stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); in dsi_dump_dsi_irqs()
1102 seq_printf(s, "-- CIO interrupts --\n"); in dsi_dump_dsi_irqs()
1131 struct dsi_data *dsi = s->private; in dsi_dump_dsi_regs()
1137 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsi, r)) in dsi_dump_dsi_regs()
1234 return -ENODEV; in dsi_cio_power()
1250 if (!(dsi->data->quirks & DSI_QUIRK_GNQ)) in dsi_get_line_buf_size()
1291 for (i = 0; i < dsi->num_lanes_used; ++i) { in dsi_set_lane_config()
1296 for (t = 0; t < dsi->num_lanes_supported; ++t) in dsi_set_lane_config()
1297 if (dsi->lanes[t].function == functions[i]) in dsi_set_lane_config()
1300 if (t == dsi->num_lanes_supported) in dsi_set_lane_config()
1301 return -EINVAL; in dsi_set_lane_config()
1304 polarity = dsi->lanes[t].polarity; in dsi_set_lane_config()
1311 for (; i < dsi->num_lanes_supported; ++i) { in dsi_set_lane_config()
1326 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr()
1333 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns()
1370 /* min tclk-prepare + tclk-zero = 300ns */ in dsi_cio_timings()
1402 if (dsi->data->quirks & DSI_QUIRK_PHY_DCC) { in dsi_cio_timings()
1423 if (dsi->data->quirks & DSI_QUIRK_REVERSE_TXCLKESC) in dsi_cio_wait_tx_clk_esc_reset()
1428 for (i = 0; i < dsi->num_lanes_supported; ++i) in dsi_cio_wait_tx_clk_esc_reset()
1429 in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; in dsi_cio_wait_tx_clk_esc_reset()
1439 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
1444 if (ok == dsi->num_lanes_supported) in dsi_cio_wait_tx_clk_esc_reset()
1447 if (--t == 0) { in dsi_cio_wait_tx_clk_esc_reset()
1448 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
1453 "out of reset\n", i); in dsi_cio_wait_tx_clk_esc_reset()
1455 return -EIO; in dsi_cio_wait_tx_clk_esc_reset()
1468 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_get_lane_mask()
1469 if (dsi->lanes[i].function != DSI_LANE_UNUSED) in dsi_get_lane_mask()
1493 if (dsi->module_id == 0) { in dsi_omap4_mux_pads()
1498 } else if (dsi->module_id == 1) { in dsi_omap4_mux_pads()
1504 return -ENODEV; in dsi_omap4_mux_pads()
1507 return regmap_update_bits(dsi->syscon, OMAP4_DSIPHY_SYSCON_OFFSET, in dsi_omap4_mux_pads()
1524 if (dsi->module_id == 0) in dsi_omap5_mux_pads()
1526 else if (dsi->module_id == 1) in dsi_omap5_mux_pads()
1529 return -ENODEV; in dsi_omap5_mux_pads()
1531 return regmap_update_bits(dsi->syscon, OMAP5_DSIPHY_SYSCON_OFFSET, in dsi_omap5_mux_pads()
1538 if (dsi->data->model == DSI_MODEL_OMAP4) in dsi_enable_pads()
1540 if (dsi->data->model == DSI_MODEL_OMAP5) in dsi_enable_pads()
1547 if (dsi->data->model == DSI_MODEL_OMAP4) in dsi_disable_pads()
1549 else if (dsi->data->model == DSI_MODEL_OMAP5) in dsi_disable_pads()
1572 DSSERR("CIO SCP Clock domain not coming out of reset.\n"); in dsi_cio_init()
1573 r = -EIO; in dsi_cio_init()
1594 DSSERR("CIO PWR clock domain not coming out of reset.\n"); in dsi_cio_init()
1595 r = -ENODEV; in dsi_cio_init()
1614 !(dsi->dsidev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS), in dsi_cio_init()
1650 dsi->vc[0].tx_fifo_size = size1; in dsi_config_tx_fifo()
1651 dsi->vc[1].tx_fifo_size = size2; in dsi_config_tx_fifo()
1652 dsi->vc[2].tx_fifo_size = size3; in dsi_config_tx_fifo()
1653 dsi->vc[3].tx_fifo_size = size4; in dsi_config_tx_fifo()
1657 int size = dsi->vc[i].tx_fifo_size; in dsi_config_tx_fifo()
1682 dsi->vc[0].rx_fifo_size = size1; in dsi_config_rx_fifo()
1683 dsi->vc[1].rx_fifo_size = size2; in dsi_config_rx_fifo()
1684 dsi->vc[2].rx_fifo_size = size3; in dsi_config_rx_fifo()
1685 dsi->vc[3].rx_fifo_size = size4; in dsi_config_rx_fifo()
1689 int size = dsi->vc[i].rx_fifo_size; in dsi_config_rx_fifo()
1716 return -EIO; in dsi_force_tx_stop_mode_io()
1731 struct dsi_data *dsi = vp_data->dsi; in dsi_packet_sent_handler_vp()
1732 const int vc = dsi->update_vc; in dsi_packet_sent_handler_vp()
1733 u8 bit = dsi->te_enabled ? 30 : 31; in dsi_packet_sent_handler_vp()
1736 complete(vp_data->completion); in dsi_packet_sent_handler_vp()
1749 bit = dsi->te_enabled ? 30 : 31; in dsi_sync_vc_vp()
1761 r = -EIO; in dsi_sync_vc_vp()
1781 struct dsi_data *dsi = l4_data->dsi; in dsi_packet_sent_handler_l4()
1782 const int vc = dsi->update_vc; in dsi_packet_sent_handler_l4()
1785 complete(l4_data->completion); in dsi_packet_sent_handler_l4()
1807 r = -EIO; in dsi_sync_vc_l4()
1832 switch (dsi->vc[vc].source) { in dsi_sync_vc()
1839 return -EINVAL; in dsi_sync_vc()
1854 return -EIO; in dsi_vc_enable()
1879 if (dsi->data->quirks & DSI_QUIRK_VC_OCP_WIDTH) in dsi_vc_initial_config()
1887 dsi->vc[vc].source = DSI_VC_SOURCE_L4; in dsi_vc_initial_config()
1946 DSSERR("\t\tECC Error, single-bit (corrected)\n"); in dsi_show_rx_ack_with_err()
1948 DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); in dsi_show_rx_ack_with_err()
1994 if (dsi->debug_write || dsi->debug_read) in dsi_vc_send_bta()
2037 r = -EIO; in dsi_vc_send_bta_sync()
2044 r = -EIO; in dsi_vc_send_bta_sync()
2096 if (dsi->debug_write) in dsi_vc_send_long()
2097 DSSDBG("dsi_vc_send_long, %zu bytes\n", msg->tx_len); in dsi_vc_send_long()
2100 if (dsi->vc[vc].tx_fifo_size * 32 * 4 < msg->tx_len + 4) { in dsi_vc_send_long()
2102 return -EINVAL; in dsi_vc_send_long()
2105 dsi_vc_write_long_header(dsi, vc, msg->channel, msg->type, msg->tx_len, 0); in dsi_vc_send_long()
2107 p = msg->tx_buf; in dsi_vc_send_long()
2108 for (i = 0; i < msg->tx_len >> 2; i++) { in dsi_vc_send_long()
2109 if (dsi->debug_write) in dsi_vc_send_long()
2120 i = msg->tx_len % 4; in dsi_vc_send_long()
2124 if (dsi->debug_write) in dsi_vc_send_long()
2161 if (dsi->debug_write) in dsi_vc_send_short()
2163 vc, msg->type, pkt.header[1], pkt.header[2]); in dsi_vc_send_short()
2167 return -EINVAL; in dsi_vc_send_short()
2194 if (mipi_dsi_packet_format_is_short(msg->type)) in dsi_vc_write_common()
2219 return -EIO; in dsi_vc_write_common()
2235 r = -EIO; in dsi_vc_read_rx_fifo()
2240 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2246 r = -EIO; in dsi_vc_read_rx_fifo()
2253 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2259 r = -EIO; in dsi_vc_read_rx_fifo()
2270 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2276 r = -EIO; in dsi_vc_read_rx_fifo()
2289 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2295 r = -EIO; in dsi_vc_read_rx_fifo()
2304 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2322 r = -EIO; in dsi_vc_read_rx_fifo()
2337 u8 cmd = ((u8 *)msg->tx_buf)[0]; in dsi_vc_dcs_read()
2340 if (dsi->debug_read) in dsi_vc_dcs_read()
2351 r = dsi_vc_read_rx_fifo(dsi, vc, msg->rx_buf, msg->rx_len, in dsi_vc_dcs_read()
2356 if (r != msg->rx_len) { in dsi_vc_dcs_read()
2357 r = -EIO; in dsi_vc_dcs_read()
2381 r = dsi_vc_read_rx_fifo(dsi, vc, msg->rx_buf, msg->rx_len, in dsi_vc_generic_read()
2386 if (r != msg->rx_len) { in dsi_vc_generic_read()
2387 r = -EIO; in dsi_vc_generic_read()
2393 DSSERR("%s(vc %d, reqlen %zu) failed\n", __func__, vc, msg->tx_len); in dsi_vc_generic_read()
2509 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_config_vp_num_line_buffers()
2510 int bpp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt); in dsi_config_vp_num_line_buffers()
2511 const struct videomode *vm = &dsi->vm; in dsi_config_vp_num_line_buffers()
2516 if (dsi->line_buffer_size <= vm->hactive * bpp / 8) in dsi_config_vp_num_line_buffers()
2534 if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) in dsi_config_vp_sync_events()
2552 int blanking_mode = dsi->vm_timings.blanking_mode; in dsi_config_blanking_modes()
2553 int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; in dsi_config_blanking_modes()
2554 int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; in dsi_config_blanking_modes()
2555 int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; in dsi_config_blanking_modes()
2599 return blank > transition ? blank - transition : 0; in dsi_compute_interleave_hs()
2622 tlp_avail = thsbyte_clk * (blank - trans_lp); in dsi_compute_interleave_lp()
2626 lp_inter = ((tlp_avail - 8 * thsbyte_clk - 5 * tdsi_fclk) / ttxclkesc - in dsi_compute_interleave_lp()
2640 const struct videomode *vm = &dsi->vm; in dsi_config_cmd_mode_interleaving()
2641 int bpp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt); in dsi_config_cmd_mode_interleaving()
2642 int ndl = dsi->num_lanes_used - 1; in dsi_config_cmd_mode_interleaving()
2643 int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; in dsi_config_cmd_mode_interleaving()
2681 width_bytes = DIV_ROUND_UP(vm->hactive * bpp, 8); in dsi_config_cmd_mode_interleaving()
2769 switch (mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt)) { in dsi_proto_config()
2781 return -EINVAL; in dsi_proto_config()
2793 if (!(dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC)) { in dsi_proto_config()
2803 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_config()
2826 int ndl = dsi->num_lanes_used - 1; in dsi_proto_timings()
2832 ths_zero = ths_prepare_ths_zero - ths_prepare; in dsi_proto_timings()
2879 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_timings()
2881 int hsa = dsi->vm_timings.hsa; in dsi_proto_timings()
2882 int hfp = dsi->vm_timings.hfp; in dsi_proto_timings()
2883 int hbp = dsi->vm_timings.hbp; in dsi_proto_timings()
2884 int vsa = dsi->vm_timings.vsa; in dsi_proto_timings()
2885 int vfp = dsi->vm_timings.vfp; in dsi_proto_timings()
2886 int vbp = dsi->vm_timings.vbp; in dsi_proto_timings()
2887 int window_sync = dsi->vm_timings.window_sync; in dsi_proto_timings()
2889 const struct videomode *vm = &dsi->vm; in dsi_proto_timings()
2890 int bpp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt); in dsi_proto_timings()
2893 hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; in dsi_proto_timings()
2897 width_bytes = DIV_ROUND_UP(vm->hactive * bpp, 8); in dsi_proto_timings()
2906 vsa, vm->vactive); in dsi_proto_timings()
2922 r = FLD_MOD(r, vm->vactive, 14, 0); /* VACT */ in dsi_proto_timings()
2943 if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 in dsi_configure_pins()
2945 return -EINVAL; in dsi_configure_pins()
2953 u8 lane, pol; in dsi_configure_pins() local
2959 if (dx >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
2960 return -EINVAL; in dsi_configure_pins()
2962 if (dy >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
2963 return -EINVAL; in dsi_configure_pins()
2966 if (dy != dx - 1) in dsi_configure_pins()
2967 return -EINVAL; in dsi_configure_pins()
2968 pol = 1; in dsi_configure_pins()
2971 return -EINVAL; in dsi_configure_pins()
2972 pol = 0; in dsi_configure_pins()
2978 lanes[lane].polarity = pol; in dsi_configure_pins()
2982 memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); in dsi_configure_pins()
2983 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
2990 int bpp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt); in dsi_enable_video_mode()
2994 switch (dsi->pix_fmt) { in dsi_enable_video_mode()
3008 return -EINVAL; in dsi_enable_video_mode()
3017 word_count = DIV_ROUND_UP(dsi->vm.hactive * bpp, 8); in dsi_enable_video_mode()
3019 dsi_vc_write_long_header(dsi, vc, dsi->dsidev->channel, data_type, in dsi_enable_video_mode()
3047 dev_err(dsi->dev, "failed to init dispc!\n"); in dsi_enable_video_output()
3051 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3057 r = dss_mgr_enable(&dsi->output); in dsi_enable_video_output()
3064 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3070 dev_err(dsi->dev, "failed to enable DSI encoder!\n"); in dsi_enable_video_output()
3078 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) in dsi_disable_video_output()
3081 dss_mgr_disable(&dsi->output); in dsi_disable_video_output()
3096 const unsigned vc = dsi->update_vc; in dsi_update_screen_dispc()
3097 const unsigned int line_buf_size = dsi->line_buffer_size; in dsi_update_screen_dispc()
3098 u16 w = dsi->vm.hactive; in dsi_update_screen_dispc()
3099 u16 h = dsi->vm.vactive; in dsi_update_screen_dispc()
3103 bytespp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt) / 8; in dsi_update_screen_dispc()
3124 dsi_vc_write_long_header(dsi, vc, dsi->dsidev->channel, MIPI_DSI_DCS_LONG_WRITE, in dsi_update_screen_dispc()
3127 if (dsi->te_enabled) in dsi_update_screen_dispc()
3133 /* We put SIDLEMODE to no-idle for the duration of the transfer, in dsi_update_screen_dispc()
3139 dispc_disable_sidle(dsi->dss->dispc); in dsi_update_screen_dispc()
3143 r = schedule_delayed_work(&dsi->framedone_timeout_work, in dsi_update_screen_dispc()
3147 dss_mgr_start_update(&dsi->output); in dsi_update_screen_dispc()
3149 if (dsi->te_enabled) { in dsi_update_screen_dispc()
3157 mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); in dsi_update_screen_dispc()
3171 /* SIDLEMODE back to smart-idle */ in dsi_handle_framedone()
3172 dispc_enable_sidle(dsi->dss->dispc); in dsi_handle_framedone()
3174 if (dsi->te_enabled) { in dsi_handle_framedone()
3198 dsi_handle_framedone(dsi, -ETIMEDOUT); in dsi_framedone_timeout_work_callback()
3210 cancel_delayed_work(&dsi->framedone_timeout_work); in dsi_framedone_irq_callback()
3222 dsi->update_bytes = dsi->vm.hactive * dsi->vm.vactive * in _dsi_update()
3223 mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt) / 8; in _dsi_update()
3252 if (!dsi->video_enabled) { in dsi_update_channel()
3253 r = -EIO; in dsi_update_channel()
3257 if (dsi->vm.hactive == 0 || dsi->vm.vactive == 0) { in dsi_update_channel()
3258 r = -EINVAL; in dsi_update_channel()
3269 r = _dsi_send_nop(dsi, VC_CMD, dsi->dsidev->channel); in dsi_update_channel()
3275 dsi->update_vc = vc; in dsi_update_channel()
3277 if (dsi->te_enabled && dsi->te_gpio) { in dsi_update_channel()
3278 schedule_delayed_work(&dsi->te_timeout_work, in dsi_update_channel()
3280 atomic_set(&dsi->do_ext_te_update, 1); in dsi_update_channel()
3307 dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; in dsi_configure_dispc_clocks()
3308 dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; in dsi_configure_dispc_clocks()
3310 r = dispc_calc_clock_rates(dsi->dss->dispc, fck, &dispc_cinfo); in dsi_configure_dispc_clocks()
3316 dsi->mgr_config.clock_info = dispc_cinfo; in dsi_configure_dispc_clocks()
3323 enum omap_channel dispc_channel = dsi->output.dispc_channel; in dsi_init_dispc()
3326 dss_select_lcd_clk_source(dsi->dss, dispc_channel, dsi->module_id == 0 ? in dsi_init_dispc()
3330 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { in dsi_init_dispc()
3331 r = dss_mgr_register_framedone_handler(&dsi->output, in dsi_init_dispc()
3338 dsi->mgr_config.stallmode = true; in dsi_init_dispc()
3339 dsi->mgr_config.fifohandcheck = true; in dsi_init_dispc()
3341 dsi->mgr_config.stallmode = false; in dsi_init_dispc()
3342 dsi->mgr_config.fifohandcheck = false; in dsi_init_dispc()
3349 dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; in dsi_init_dispc()
3350 dsi->mgr_config.video_port_width = in dsi_init_dispc()
3351 mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt); in dsi_init_dispc()
3352 dsi->mgr_config.lcden_sig_polarity = 0; in dsi_init_dispc()
3354 dss_mgr_set_lcd_config(&dsi->output, &dsi->mgr_config); in dsi_init_dispc()
3358 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_init_dispc()
3359 dss_mgr_unregister_framedone_handler(&dsi->output, in dsi_init_dispc()
3362 dss_select_lcd_clk_source(dsi->dss, dispc_channel, DSS_CLK_SRC_FCK); in dsi_init_dispc()
3368 enum omap_channel dispc_channel = dsi->output.dispc_channel; in dsi_uninit_dispc()
3370 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_uninit_dispc()
3371 dss_mgr_unregister_framedone_handler(&dsi->output, in dsi_uninit_dispc()
3374 dss_select_lcd_clk_source(dsi->dss, dispc_channel, DSS_CLK_SRC_FCK); in dsi_uninit_dispc()
3382 cinfo = dsi->user_dsi_cinfo; in dsi_configure_dsi_clocks()
3384 r = dss_pll_set_config(&dsi->pll, &cinfo); in dsi_configure_dsi_clocks()
3399 dsi->vc[VC_CMD].source = DSI_VC_SOURCE_L4; in dsi_setup_dsi_vcs()
3405 dsi->vc[VC_VIDEO].source = DSI_VC_SOURCE_VP; in dsi_setup_dsi_vcs()
3407 if ((dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) && in dsi_setup_dsi_vcs()
3408 !(dsi->dsidev->mode_flags & MIPI_DSI_MODE_VIDEO)) in dsi_setup_dsi_vcs()
3419 if (!(dsi->dsidev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) in dsi_setup_dsi_vcs()
3420 dsi_vc_send_null(dsi, VC_CMD, dsi->dsidev->channel); in dsi_setup_dsi_vcs()
3427 r = dss_pll_enable(&dsi->pll); in dsi_init_dsi()
3435 dss_select_dsi_clk_source(dsi->dss, dsi->module_id, in dsi_init_dsi()
3436 dsi->module_id == 0 ? in dsi_init_dsi()
3441 if (!dsi->vdds_dsi_enabled) { in dsi_init_dsi()
3442 r = regulator_enable(dsi->vdds_dsi_reg); in dsi_init_dsi()
3446 dsi->vdds_dsi_enabled = true; in dsi_init_dsi()
3471 regulator_disable(dsi->vdds_dsi_reg); in dsi_init_dsi()
3472 dsi->vdds_dsi_enabled = false; in dsi_init_dsi()
3474 dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK); in dsi_init_dsi()
3476 dss_pll_disable(&dsi->pll); in dsi_init_dsi()
3490 dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK); in dsi_uninit_dsi()
3492 dss_pll_disable(&dsi->pll); in dsi_uninit_dsi()
3494 regulator_disable(dsi->vdds_dsi_reg); in dsi_uninit_dsi()
3495 dsi->vdds_dsi_enabled = false; in dsi_uninit_dsi()
3504 if (WARN_ON(dsi->iface_enabled)) in dsi_enable()
3507 mutex_lock(&dsi->lock); in dsi_enable()
3519 dsi->iface_enabled = true; in dsi_enable()
3521 mutex_unlock(&dsi->lock); in dsi_enable()
3528 mutex_unlock(&dsi->lock); in dsi_enable()
3536 if (WARN_ON(!dsi->iface_enabled)) in dsi_disable()
3539 mutex_lock(&dsi->lock); in dsi_disable()
3550 dsi->iface_enabled = false; in dsi_disable()
3552 mutex_unlock(&dsi->lock); in dsi_disable()
3557 dsi->te_enabled = enable; in dsi_enable_te()
3559 if (dsi->te_gpio) { in dsi_enable_te()
3561 enable_irq(dsi->te_irq); in dsi_enable_te()
3563 disable_irq(dsi->te_irq); in dsi_enable_te()
3573 unsigned long byteclk = t->hsclk / 4; in print_dsi_vm()
3576 wc = DIV_ROUND_UP(t->hact * t->bitspp, 8); in print_dsi_vm()
3577 pps = DIV_ROUND_UP(wc + 6, t->ndl); /* pixel packet size */ in print_dsi_vm()
3578 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm()
3587 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm()
3589 TO_DSI_T(t->hss), in print_dsi_vm()
3590 TO_DSI_T(t->hsa), in print_dsi_vm()
3591 TO_DSI_T(t->hse), in print_dsi_vm()
3592 TO_DSI_T(t->hbp), in print_dsi_vm()
3594 TO_DSI_T(t->hfp), in print_dsi_vm()
3605 unsigned long pck = vm->pixelclock; in print_dispc_vm()
3608 hact = vm->hactive; in print_dispc_vm()
3609 bl = vm->hsync_len + vm->hback_porch + vm->hfront_porch; in print_dispc_vm()
3618 vm->hsync_len, vm->hback_porch, hact, vm->hfront_porch, in print_dispc_vm()
3620 TO_DISPC_T(vm->hsync_len), in print_dispc_vm()
3621 TO_DISPC_T(vm->hback_porch), in print_dispc_vm()
3623 TO_DISPC_T(vm->hfront_porch), in print_dispc_vm()
3635 unsigned long byteclk = t->hsclk / 4; in print_dsi_dispc_vm()
3640 dsi_tput = (u64)byteclk * t->ndl * 8; in print_dsi_dispc_vm()
3641 pck = (u32)div64_u64(dsi_tput, t->bitspp); in print_dsi_dispc_vm()
3642 dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); in print_dsi_dispc_vm()
3643 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm()
3646 vm.hsync_len = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm()
3647 vm.hback_porch = div64_u64((u64)t->hbp * pck, byteclk); in print_dsi_dispc_vm()
3648 vm.hfront_porch = div64_u64((u64)t->hfp * pck, byteclk); in print_dsi_dispc_vm()
3649 vm.hactive = t->hact; in print_dsi_dispc_vm()
3659 struct videomode *vm = &ctx->vm; in dsi_cm_calc_dispc_cb()
3661 ctx->dispc_cinfo.lck_div = lckd; in dsi_cm_calc_dispc_cb()
3662 ctx->dispc_cinfo.pck_div = pckd; in dsi_cm_calc_dispc_cb()
3663 ctx->dispc_cinfo.lck = lck; in dsi_cm_calc_dispc_cb()
3664 ctx->dispc_cinfo.pck = pck; in dsi_cm_calc_dispc_cb()
3666 *vm = *ctx->config->vm; in dsi_cm_calc_dispc_cb()
3667 vm->pixelclock = pck; in dsi_cm_calc_dispc_cb()
3668 vm->hactive = ctx->config->vm->hactive; in dsi_cm_calc_dispc_cb()
3669 vm->vactive = ctx->config->vm->vactive; in dsi_cm_calc_dispc_cb()
3670 vm->hsync_len = vm->hfront_porch = vm->hback_porch = vm->vsync_len = 1; in dsi_cm_calc_dispc_cb()
3671 vm->vfront_porch = vm->vback_porch = 0; in dsi_cm_calc_dispc_cb()
3681 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_cm_calc_hsdiv_cb()
3682 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_cm_calc_hsdiv_cb()
3684 return dispc_div_calc(ctx->dsi->dss->dispc, dispc, in dsi_cm_calc_hsdiv_cb()
3685 ctx->req_pck_min, ctx->req_pck_max, in dsi_cm_calc_hsdiv_cb()
3693 struct dsi_data *dsi = ctx->dsi; in dsi_cm_calc_pll_cb()
3695 ctx->dsi_cinfo.n = n; in dsi_cm_calc_pll_cb()
3696 ctx->dsi_cinfo.m = m; in dsi_cm_calc_pll_cb()
3697 ctx->dsi_cinfo.fint = fint; in dsi_cm_calc_pll_cb()
3698 ctx->dsi_cinfo.clkdco = clkdco; in dsi_cm_calc_pll_cb()
3700 return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min, in dsi_cm_calc_pll_cb()
3701 dsi->data->max_fck_freq, in dsi_cm_calc_pll_cb()
3714 clkin = clk_get_rate(dsi->pll.clkin); in dsi_cm_calc()
3715 bitspp = mipi_dsi_pixel_format_to_bpp(cfg->pixel_format); in dsi_cm_calc()
3716 ndl = dsi->num_lanes_used - 1; in dsi_cm_calc()
3724 pck = cfg->vm->pixelclock; in dsi_cm_calc()
3729 ctx->dsi = dsi; in dsi_cm_calc()
3730 ctx->pll = &dsi->pll; in dsi_cm_calc()
3731 ctx->config = cfg; in dsi_cm_calc()
3732 ctx->req_pck_min = pck; in dsi_cm_calc()
3733 ctx->req_pck_nom = pck; in dsi_cm_calc()
3734 ctx->req_pck_max = pck * 3 / 2; in dsi_cm_calc()
3736 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); in dsi_cm_calc()
3737 pll_max = cfg->hs_clk_max * 4; in dsi_cm_calc()
3739 return dss_pll_calc_a(ctx->pll, clkin, in dsi_cm_calc()
3746 struct dsi_data *dsi = ctx->dsi; in dsi_vm_calc_blanking()
3747 const struct omap_dss_dsi_config *cfg = ctx->config; in dsi_vm_calc_blanking()
3748 int bitspp = mipi_dsi_pixel_format_to_bpp(cfg->pixel_format); in dsi_vm_calc_blanking()
3749 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc_blanking()
3750 unsigned long hsclk = ctx->dsi_cinfo.clkdco / 4; in dsi_vm_calc_blanking()
3766 req_vm = cfg->vm; in dsi_vm_calc_blanking()
3767 req_pck_min = ctx->req_pck_min; in dsi_vm_calc_blanking()
3768 req_pck_max = ctx->req_pck_max; in dsi_vm_calc_blanking()
3769 req_pck_nom = ctx->req_pck_nom; in dsi_vm_calc_blanking()
3771 dispc_pck = ctx->dispc_cinfo.pck; in dsi_vm_calc_blanking()
3774 xres = req_vm->hactive; in dsi_vm_calc_blanking()
3776 panel_hbl = req_vm->hfront_porch + req_vm->hback_porch + in dsi_vm_calc_blanking()
3777 req_vm->hsync_len; in dsi_vm_calc_blanking()
3786 if (dsi->line_buffer_size < xres * bitspp / 8) { in dsi_vm_calc_blanking()
3798 /* When non-burst mode, DSI tput must be below max requirement. */ in dsi_vm_calc_blanking()
3799 if (cfg->trans_mode != OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc_blanking()
3806 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
3807 if (ndl == 3 && req_vm->hsync_len == 0) in dsi_vm_calc_blanking()
3823 dsi_hbl = dsi_htot - dsi_hact; in dsi_vm_calc_blanking()
3832 dispc_hbl = dispc_htot - xres; in dsi_vm_calc_blanking()
3836 dsi_vm = &ctx->dsi_vm; in dsi_vm_calc_blanking()
3839 dsi_vm->hsclk = hsclk; in dsi_vm_calc_blanking()
3841 dsi_vm->ndl = ndl; in dsi_vm_calc_blanking()
3842 dsi_vm->bitspp = bitspp; in dsi_vm_calc_blanking()
3844 if (cfg->trans_mode != OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
3846 } else if (ndl == 3 && req_vm->hsync_len == 0) { in dsi_vm_calc_blanking()
3849 hsa = div64_u64((u64)req_vm->hsync_len * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
3850 hsa = max(hsa - hse, 1); in dsi_vm_calc_blanking()
3853 hbp = div64_u64((u64)req_vm->hback_porch * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
3856 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
3861 t = 1 - hfp; in dsi_vm_calc_blanking()
3862 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
3863 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
3867 t = 1 - hfp; in dsi_vm_calc_blanking()
3868 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
3869 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
3876 dsi_vm->hss = hss; in dsi_vm_calc_blanking()
3877 dsi_vm->hsa = hsa; in dsi_vm_calc_blanking()
3878 dsi_vm->hse = hse; in dsi_vm_calc_blanking()
3879 dsi_vm->hbp = hbp; in dsi_vm_calc_blanking()
3880 dsi_vm->hact = xres; in dsi_vm_calc_blanking()
3881 dsi_vm->hfp = hfp; in dsi_vm_calc_blanking()
3883 dsi_vm->vsa = req_vm->vsync_len; in dsi_vm_calc_blanking()
3884 dsi_vm->vbp = req_vm->vback_porch; in dsi_vm_calc_blanking()
3885 dsi_vm->vact = req_vm->vactive; in dsi_vm_calc_blanking()
3886 dsi_vm->vfp = req_vm->vfront_porch; in dsi_vm_calc_blanking()
3888 dsi_vm->trans_mode = cfg->trans_mode; in dsi_vm_calc_blanking()
3890 dsi_vm->blanking_mode = 0; in dsi_vm_calc_blanking()
3891 dsi_vm->hsa_blanking_mode = 1; in dsi_vm_calc_blanking()
3892 dsi_vm->hfp_blanking_mode = 1; in dsi_vm_calc_blanking()
3893 dsi_vm->hbp_blanking_mode = 1; in dsi_vm_calc_blanking()
3895 dsi_vm->window_sync = 4; in dsi_vm_calc_blanking()
3899 dispc_vm = &ctx->vm; in dsi_vm_calc_blanking()
3901 dispc_vm->pixelclock = dispc_pck; in dsi_vm_calc_blanking()
3903 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
3904 hsa = div64_u64((u64)req_vm->hsync_len * dispc_pck, in dsi_vm_calc_blanking()
3911 hbp = div64_u64((u64)req_vm->hback_porch * dispc_pck, req_pck_nom); in dsi_vm_calc_blanking()
3914 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
3919 t = 1 - hfp; in dsi_vm_calc_blanking()
3920 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
3921 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
3925 t = 1 - hfp; in dsi_vm_calc_blanking()
3926 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
3927 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
3934 dispc_vm->hfront_porch = hfp; in dsi_vm_calc_blanking()
3935 dispc_vm->hsync_len = hsa; in dsi_vm_calc_blanking()
3936 dispc_vm->hback_porch = hbp; in dsi_vm_calc_blanking()
3947 ctx->dispc_cinfo.lck_div = lckd; in dsi_vm_calc_dispc_cb()
3948 ctx->dispc_cinfo.pck_div = pckd; in dsi_vm_calc_dispc_cb()
3949 ctx->dispc_cinfo.lck = lck; in dsi_vm_calc_dispc_cb()
3950 ctx->dispc_cinfo.pck = pck; in dsi_vm_calc_dispc_cb()
3956 print_dispc_vm("dispc", &ctx->vm); in dsi_vm_calc_dispc_cb()
3957 print_dsi_vm("dsi ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
3958 print_dispc_vm("req ", ctx->config->vm); in dsi_vm_calc_dispc_cb()
3959 print_dsi_dispc_vm("act ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
3971 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_vm_calc_hsdiv_cb()
3972 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_vm_calc_hsdiv_cb()
3979 if (ctx->config->trans_mode == OMAP_DSS_DSI_BURST_MODE) in dsi_vm_calc_hsdiv_cb()
3980 pck_max = ctx->req_pck_max + 10000000; in dsi_vm_calc_hsdiv_cb()
3982 pck_max = ctx->req_pck_max; in dsi_vm_calc_hsdiv_cb()
3984 return dispc_div_calc(ctx->dsi->dss->dispc, dispc, in dsi_vm_calc_hsdiv_cb()
3985 ctx->req_pck_min, pck_max, in dsi_vm_calc_hsdiv_cb()
3993 struct dsi_data *dsi = ctx->dsi; in dsi_vm_calc_pll_cb()
3995 ctx->dsi_cinfo.n = n; in dsi_vm_calc_pll_cb()
3996 ctx->dsi_cinfo.m = m; in dsi_vm_calc_pll_cb()
3997 ctx->dsi_cinfo.fint = fint; in dsi_vm_calc_pll_cb()
3998 ctx->dsi_cinfo.clkdco = clkdco; in dsi_vm_calc_pll_cb()
4000 return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min, in dsi_vm_calc_pll_cb()
4001 dsi->data->max_fck_freq, in dsi_vm_calc_pll_cb()
4009 const struct videomode *vm = cfg->vm; in dsi_vm_calc()
4013 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc()
4014 int bitspp = mipi_dsi_pixel_format_to_bpp(cfg->pixel_format); in dsi_vm_calc()
4017 clkin = clk_get_rate(dsi->pll.clkin); in dsi_vm_calc()
4020 ctx->dsi = dsi; in dsi_vm_calc()
4021 ctx->pll = &dsi->pll; in dsi_vm_calc()
4022 ctx->config = cfg; in dsi_vm_calc()
4025 ctx->req_pck_min = vm->pixelclock - 1000; in dsi_vm_calc()
4026 ctx->req_pck_nom = vm->pixelclock; in dsi_vm_calc()
4027 ctx->req_pck_max = vm->pixelclock + 1000; in dsi_vm_calc()
4029 byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); in dsi_vm_calc()
4030 pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); in dsi_vm_calc()
4032 if (cfg->trans_mode == OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc()
4033 pll_max = cfg->hs_clk_max * 4; in dsi_vm_calc()
4036 byteclk_max = div64_u64((u64)ctx->req_pck_max * bitspp, in dsi_vm_calc()
4042 return dss_pll_calc_a(ctx->pll, clkin, in dsi_vm_calc()
4051 return dsi->mode == OMAP_DSS_DSI_VIDEO_MODE; in dsi_is_video_mode()
4058 struct omap_dss_dsi_config cfg = dsi->config; in __dsi_calc_config()
4066 cfg.mode = dsi->mode; in __dsi_calc_config()
4067 cfg.pixel_format = dsi->pix_fmt; in __dsi_calc_config()
4069 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) in __dsi_calc_config()
4075 return -EINVAL; in __dsi_calc_config()
4077 dsi_pll_calc_dsi_fck(dsi, &ctx->dsi_cinfo); in __dsi_calc_config()
4079 r = dsi_lp_clock_calc(ctx->dsi_cinfo.clkout[HSDIV_DSI], in __dsi_calc_config()
4080 cfg.lp_clk_min, cfg.lp_clk_max, &ctx->lp_cinfo); in __dsi_calc_config()
4094 mutex_lock(&dsi->lock); in dsi_set_config()
4102 dsi->user_lp_cinfo = ctx.lp_cinfo; in dsi_set_config()
4103 dsi->user_dsi_cinfo = ctx.dsi_cinfo; in dsi_set_config()
4104 dsi->user_dispc_cinfo = ctx.dispc_cinfo; in dsi_set_config()
4106 dsi->vm = ctx.vm; in dsi_set_config()
4112 dsi->vm.flags &= ~DISPLAY_FLAGS_INTERLACED; in dsi_set_config()
4113 dsi->vm.flags &= ~DISPLAY_FLAGS_HSYNC_LOW; in dsi_set_config()
4114 dsi->vm.flags |= DISPLAY_FLAGS_HSYNC_HIGH; in dsi_set_config()
4115 dsi->vm.flags &= ~DISPLAY_FLAGS_VSYNC_LOW; in dsi_set_config()
4116 dsi->vm.flags |= DISPLAY_FLAGS_VSYNC_HIGH; in dsi_set_config()
4120 * converted to the omapdrm-managed encoder model. in dsi_set_config()
4122 dsi->vm.flags &= ~DISPLAY_FLAGS_PIXDATA_NEGEDGE; in dsi_set_config()
4123 dsi->vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; in dsi_set_config()
4124 dsi->vm.flags &= ~DISPLAY_FLAGS_DE_LOW; in dsi_set_config()
4125 dsi->vm.flags |= DISPLAY_FLAGS_DE_HIGH; in dsi_set_config()
4126 dsi->vm.flags &= ~DISPLAY_FLAGS_SYNC_POSEDGE; in dsi_set_config()
4127 dsi->vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE; in dsi_set_config()
4129 dss_mgr_set_timings(&dsi->output, &dsi->vm); in dsi_set_config()
4131 dsi->vm_timings = ctx.dsi_vm; in dsi_set_config()
4133 mutex_unlock(&dsi->lock); in dsi_set_config()
4137 mutex_unlock(&dsi->lock); in dsi_set_config()
4150 switch (dsi->data->model) { in dsi_get_dispc_channel()
4155 switch (dsi->module_id) { in dsi_get_dispc_channel()
4166 switch (dsi->module_id) { in dsi_get_dispc_channel()
4185 struct omap_dss_device *dssdev = &dsi->output; in _omap_dsi_host_transfer()
4188 dsi_vc_enable_hs(dssdev, vc, !(msg->flags & MIPI_DSI_MSG_USE_LPM)); in _omap_dsi_host_transfer()
4190 switch (msg->type) { in _omap_dsi_host_transfer()
4211 r = -EINVAL; in _omap_dsi_host_transfer()
4218 if (msg->type == MIPI_DSI_DCS_SHORT_WRITE || in _omap_dsi_host_transfer()
4219 msg->type == MIPI_DSI_DCS_SHORT_WRITE_PARAM) { in _omap_dsi_host_transfer()
4220 u8 cmd = ((u8 *)msg->tx_buf)[0]; in _omap_dsi_host_transfer()
4240 if (!dsi->iface_enabled) { in omap_dsi_host_transfer()
4242 schedule_delayed_work(&dsi->dsi_disable_work, msecs_to_jiffies(2000)); in omap_dsi_host_transfer()
4256 clk = devm_clk_get(dsi->dev, "fck"); in dsi_get_clocks()
4262 dsi->dss_clk = clk; in dsi_get_clocks()
4277 old = atomic_cmpxchg(&dsi->do_ext_te_update, 1, 0); in omap_dsi_te_irq_handler()
4279 cancel_delayed_work(&dsi->te_timeout_work); in omap_dsi_te_irq_handler()
4292 old = atomic_cmpxchg(&dsi->do_ext_te_update, 1, 0); in omap_dsi_te_timeout_work_callback()
4294 dev_err(dsi->dev, "TE not received for 250ms!\n"); in omap_dsi_te_timeout_work_callback()
4305 dsi->te_gpio = gpiod_get(&client->dev, "te-gpios", GPIOD_IN); in omap_dsi_register_te_irq()
4306 if (IS_ERR(dsi->te_gpio)) { in omap_dsi_register_te_irq()
4307 err = PTR_ERR(dsi->te_gpio); in omap_dsi_register_te_irq()
4309 if (err == -ENOENT) { in omap_dsi_register_te_irq()
4310 dsi->te_gpio = NULL; in omap_dsi_register_te_irq()
4314 dev_err(dsi->dev, "Could not get TE gpio: %d\n", err); in omap_dsi_register_te_irq()
4318 te_irq = gpiod_to_irq(dsi->te_gpio); in omap_dsi_register_te_irq()
4320 gpiod_put(dsi->te_gpio); in omap_dsi_register_te_irq()
4321 dsi->te_gpio = NULL; in omap_dsi_register_te_irq()
4322 return -EINVAL; in omap_dsi_register_te_irq()
4325 dsi->te_irq = te_irq; in omap_dsi_register_te_irq()
4333 dev_err(dsi->dev, "request irq failed with %d\n", err); in omap_dsi_register_te_irq()
4334 gpiod_put(dsi->te_gpio); in omap_dsi_register_te_irq()
4335 dsi->te_gpio = NULL; in omap_dsi_register_te_irq()
4339 INIT_DEFERRABLE_WORK(&dsi->te_timeout_work, in omap_dsi_register_te_irq()
4342 dev_dbg(dsi->dev, "Using GPIO TE\n"); in omap_dsi_register_te_irq()
4349 if (dsi->te_gpio) { in omap_dsi_unregister_te_irq()
4350 free_irq(dsi->te_irq, dsi); in omap_dsi_unregister_te_irq()
4351 cancel_delayed_work(&dsi->te_timeout_work); in omap_dsi_unregister_te_irq()
4352 gpiod_put(dsi->te_gpio); in omap_dsi_unregister_te_irq()
4353 dsi->te_gpio = NULL; in omap_dsi_unregister_te_irq()
4363 if (dsi->dsidev) { in omap_dsi_host_attach()
4365 return -EBUSY; in omap_dsi_host_attach()
4368 if (mipi_dsi_pixel_format_to_bpp(client->format) < 0) { in omap_dsi_host_attach()
4370 return -EINVAL; in omap_dsi_host_attach()
4373 atomic_set(&dsi->do_ext_te_update, 0); in omap_dsi_host_attach()
4375 if (client->mode_flags & MIPI_DSI_MODE_VIDEO) { in omap_dsi_host_attach()
4376 dsi->mode = OMAP_DSS_DSI_VIDEO_MODE; in omap_dsi_host_attach()
4382 dsi->mode = OMAP_DSS_DSI_CMD_MODE; in omap_dsi_host_attach()
4385 dsi->dsidev = client; in omap_dsi_host_attach()
4386 dsi->pix_fmt = client->format; in omap_dsi_host_attach()
4388 dsi->config.hs_clk_min = 150000000; // TODO: get from client? in omap_dsi_host_attach()
4389 dsi->config.hs_clk_max = client->hs_rate; in omap_dsi_host_attach()
4390 dsi->config.lp_clk_min = 7000000; // TODO: get from client? in omap_dsi_host_attach()
4391 dsi->config.lp_clk_max = client->lp_rate; in omap_dsi_host_attach()
4393 if (client->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in omap_dsi_host_attach()
4394 dsi->config.trans_mode = OMAP_DSS_DSI_BURST_MODE; in omap_dsi_host_attach()
4395 else if (client->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in omap_dsi_host_attach()
4396 dsi->config.trans_mode = OMAP_DSS_DSI_PULSE_MODE; in omap_dsi_host_attach()
4398 dsi->config.trans_mode = OMAP_DSS_DSI_EVENT_MODE; in omap_dsi_host_attach()
4408 if (WARN_ON(dsi->dsidev != client)) in omap_dsi_host_detach()
4409 return -EINVAL; in omap_dsi_host_detach()
4411 cancel_delayed_work_sync(&dsi->dsi_disable_work); in omap_dsi_host_detach()
4415 if (dsi->iface_enabled) in omap_dsi_host_detach()
4421 dsi->dsidev = NULL; in omap_dsi_host_detach()
4431 /* -----------------------------------------------------------------------------
4444 .n_max = (1 << 7) - 1,
4445 .m_max = (1 << 11) - 1,
4446 .mX_max = (1 << 4) - 1,
4471 .n_max = (1 << 8) - 1,
4472 .m_max = (1 << 12) - 1,
4473 .mX_max = (1 << 5) - 1,
4498 .n_max = (1 << 8) - 1,
4499 .m_max = (1 << 12) - 1,
4500 .mX_max = (1 << 5) - 1,
4524 struct dss_pll *pll = &dsi->pll; in dsi_init_pll_data()
4528 clk = devm_clk_get(dsi->dev, "sys_clk"); in dsi_init_pll_data()
4534 pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; in dsi_init_pll_data()
4535 pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; in dsi_init_pll_data()
4536 pll->clkin = clk; in dsi_init_pll_data()
4537 pll->base = dsi->pll_base; in dsi_init_pll_data()
4538 pll->hw = dsi->data->pll_hw; in dsi_init_pll_data()
4539 pll->ops = &dsi_pll_ops; in dsi_init_pll_data()
4548 /* -----------------------------------------------------------------------------
4560 dsi->dss = dss; in dsi_bind()
4572 dsi->line_buffer_size = dsi_get_line_buf_size(dsi); in dsi_bind()
4576 snprintf(name, sizeof(name), "dsi%u_regs", dsi->module_id + 1); in dsi_bind()
4577 dsi->debugfs.regs = dss_debugfs_create_file(dss, name, in dsi_bind()
4580 snprintf(name, sizeof(name), "dsi%u_irqs", dsi->module_id + 1); in dsi_bind()
4581 dsi->debugfs.irqs = dss_debugfs_create_file(dss, name, in dsi_bind()
4584 snprintf(name, sizeof(name), "dsi%u_clks", dsi->module_id + 1); in dsi_bind()
4585 dsi->debugfs.clks = dss_debugfs_create_file(dss, name, in dsi_bind()
4595 dss_debugfs_remove_file(dsi->debugfs.clks); in dsi_unbind()
4596 dss_debugfs_remove_file(dsi->debugfs.irqs); in dsi_unbind()
4597 dss_debugfs_remove_file(dsi->debugfs.regs); in dsi_unbind()
4599 WARN_ON(dsi->scp_clk_refcount > 0); in dsi_unbind()
4601 dss_pll_unregister(&dsi->pll); in dsi_unbind()
4609 /* -----------------------------------------------------------------------------
4619 return -EINVAL; in dsi_bridge_attach()
4621 return drm_bridge_attach(bridge->encoder, dsi->output.next_bridge, in dsi_bridge_attach()
4634 mutex_lock(&dsi->lock); in dsi_bridge_mode_valid()
4636 mutex_unlock(&dsi->lock); in dsi_bridge_mode_valid()
4647 dsi_set_config(&dsi->output, adjusted_mode); in dsi_bridge_mode_set()
4653 struct omap_dss_device *dssdev = &dsi->output; in dsi_bridge_enable()
4655 cancel_delayed_work_sync(&dsi->dsi_disable_work); in dsi_bridge_enable()
4659 if (!dsi->iface_enabled) in dsi_bridge_enable()
4664 dsi->video_enabled = true; in dsi_bridge_enable()
4672 struct omap_dss_device *dssdev = &dsi->output; in dsi_bridge_disable()
4674 cancel_delayed_work_sync(&dsi->dsi_disable_work); in dsi_bridge_disable()
4678 dsi->video_enabled = false; in dsi_bridge_disable()
4697 dsi->bridge.funcs = &dsi_bridge_funcs; in dsi_bridge_init()
4698 dsi->bridge.of_node = dsi->host.dev->of_node; in dsi_bridge_init()
4699 dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; in dsi_bridge_init()
4701 drm_bridge_add(&dsi->bridge); in dsi_bridge_init()
4706 drm_bridge_remove(&dsi->bridge); in dsi_bridge_cleanup()
4709 /* -----------------------------------------------------------------------------
4715 struct omap_dss_device *out = &dsi->output; in dsi_init_output() local
4720 out->dev = dsi->dev; in dsi_init_output()
4721 out->id = dsi->module_id == 0 ? in dsi_init_output()
4724 out->type = OMAP_DISPLAY_TYPE_DSI; in dsi_init_output()
4725 out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; in dsi_init_output()
4726 out->dispc_channel = dsi_get_dispc_channel(dsi); in dsi_init_output()
4727 out->dsi_ops = &dsi_ops; in dsi_init_output()
4728 out->of_port = 0; in dsi_init_output()
4729 out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE in dsi_init_output()
4733 r = omapdss_device_init_output(out, &dsi->bridge); in dsi_init_output()
4739 omapdss_device_register(out); in dsi_init_output()
4746 struct omap_dss_device *out = &dsi->output; in dsi_uninit_output() local
4748 omapdss_device_unregister(out); in dsi_uninit_output()
4749 omapdss_device_cleanup_output(out); in dsi_uninit_output()
4755 struct device_node *node = dsi->dev->of_node; in dsi_probe_of()
4768 dev_err(dsi->dev, "failed to find lane data\n"); in dsi_probe_of()
4769 r = -EINVAL; in dsi_probe_of()
4776 num_pins > dsi->num_lanes_supported * 2) { in dsi_probe_of()
4777 dev_err(dsi->dev, "bad number of lanes\n"); in dsi_probe_of()
4778 r = -EINVAL; in dsi_probe_of()
4784 dev_err(dsi->dev, "failed to read lane data\n"); in dsi_probe_of()
4790 dev_err(dsi->dev, "failed to configure pins"); in dsi_probe_of()
4811 .max_pll_lpdiv = (1 << 13) - 1,
4823 .max_pll_lpdiv = (1 << 13) - 1,
4836 .max_pll_lpdiv = (1 << 13) - 1,
4850 .max_pll_lpdiv = (1 << 13) - 1,
4856 { .compatible = "ti,omap3-dsi", .data = &dsi_of_data_omap36xx, },
4857 { .compatible = "ti,omap4-dsi", .data = &dsi_of_data_omap4, },
4858 { .compatible = "ti,omap5-dsi", .data = &dsi_of_data_omap5, },
4874 if (dsi->iface_enabled && !dsi->video_enabled) in omap_dsi_disable_work_callback()
4884 struct device *dev = &pdev->dev; in dsi_probe()
4892 return -ENOMEM; in dsi_probe()
4894 dsi->dev = dev; in dsi_probe()
4897 spin_lock_init(&dsi->irq_lock); in dsi_probe()
4898 spin_lock_init(&dsi->errors_lock); in dsi_probe()
4899 dsi->errors = 0; in dsi_probe()
4902 spin_lock_init(&dsi->irq_stats_lock); in dsi_probe()
4903 dsi->irq_stats.last_reset = jiffies; in dsi_probe()
4906 mutex_init(&dsi->lock); in dsi_probe()
4907 sema_init(&dsi->bus_lock, 1); in dsi_probe()
4909 INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, in dsi_probe()
4912 INIT_DEFERRABLE_WORK(&dsi->dsi_disable_work, omap_dsi_disable_work_callback); in dsi_probe()
4915 timer_setup(&dsi->te_timer, dsi_te_timeout, 0); in dsi_probe()
4919 dsi->proto_base = devm_ioremap_resource(dev, dsi_mem); in dsi_probe()
4920 if (IS_ERR(dsi->proto_base)) in dsi_probe()
4921 return PTR_ERR(dsi->proto_base); in dsi_probe()
4923 dsi->phy_base = devm_platform_ioremap_resource_byname(pdev, "phy"); in dsi_probe()
4924 if (IS_ERR(dsi->phy_base)) in dsi_probe()
4925 return PTR_ERR(dsi->phy_base); in dsi_probe()
4927 dsi->pll_base = devm_platform_ioremap_resource_byname(pdev, "pll"); in dsi_probe()
4928 if (IS_ERR(dsi->pll_base)) in dsi_probe()
4929 return PTR_ERR(dsi->pll_base); in dsi_probe()
4931 dsi->irq = platform_get_irq(pdev, 0); in dsi_probe()
4932 if (dsi->irq < 0) { in dsi_probe()
4934 return -ENODEV; in dsi_probe()
4937 r = devm_request_irq(dev, dsi->irq, omap_dsi_irq_handler, in dsi_probe()
4944 dsi->vdds_dsi_reg = devm_regulator_get(dev, "vdd"); in dsi_probe()
4945 if (IS_ERR(dsi->vdds_dsi_reg)) { in dsi_probe()
4946 if (PTR_ERR(dsi->vdds_dsi_reg) != -EPROBE_DEFER) in dsi_probe()
4948 return PTR_ERR(dsi->vdds_dsi_reg); in dsi_probe()
4953 dsi->data = soc->data; in dsi_probe()
4955 dsi->data = of_match_node(dsi_of_match, dev->of_node)->data; in dsi_probe()
4957 d = dsi->data->modules; in dsi_probe()
4958 while (d->address != 0 && d->address != dsi_mem->start) in dsi_probe()
4961 if (d->address == 0) { in dsi_probe()
4963 return -ENODEV; in dsi_probe()
4966 dsi->module_id = d->id; in dsi_probe()
4968 if (dsi->data->model == DSI_MODEL_OMAP4 || in dsi_probe()
4969 dsi->data->model == DSI_MODEL_OMAP5) { in dsi_probe()
4977 dsi->data->model == DSI_MODEL_OMAP4 ? in dsi_probe()
4980 return -ENODEV; in dsi_probe()
4982 dsi->syscon = syscon_node_to_regmap(np); in dsi_probe()
4987 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) in dsi_probe()
4988 dsi->vc[i].source = DSI_VC_SOURCE_L4; in dsi_probe()
4998 if (dsi->data->quirks & DSI_QUIRK_GNQ) { in dsi_probe()
5001 dsi->num_lanes_supported = 1 + REG_GET(dsi, DSI_GNQ, 11, 9); in dsi_probe()
5004 dsi->num_lanes_supported = 3; in dsi_probe()
5007 dsi->host.ops = &omap_dsi_host_ops; in dsi_probe()
5008 dsi->host.dev = &pdev->dev; in dsi_probe()
5016 r = mipi_dsi_host_register(&dsi->host); in dsi_probe()
5018 dev_err(&pdev->dev, "failed to register DSI host: %d\n", r); in dsi_probe()
5026 r = component_add(&pdev->dev, &dsi_component_ops); in dsi_probe()
5035 mipi_dsi_host_unregister(&dsi->host); in dsi_probe()
5045 component_del(&pdev->dev, &dsi_component_ops); in dsi_remove()
5049 mipi_dsi_host_unregister(&dsi->host); in dsi_remove()
5051 pm_runtime_disable(&pdev->dev); in dsi_remove()
5053 if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { in dsi_remove()
5054 regulator_disable(dsi->vdds_dsi_reg); in dsi_remove()
5055 dsi->vdds_dsi_enabled = false; in dsi_remove()
5065 dsi->is_enabled = false; in dsi_runtime_suspend()
5069 synchronize_irq(dsi->irq); in dsi_runtime_suspend()
5078 dsi->is_enabled = true; in dsi_runtime_resume()