Lines Matching +full:0 +full:x1f000000
43 const u32 instlo = nvkm_ro32(mem, base + 0x00); in gv100_fault_buffer_process()
44 const u32 insthi = nvkm_ro32(mem, base + 0x04); in gv100_fault_buffer_process()
45 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process()
46 const u32 addrhi = nvkm_ro32(mem, base + 0x0c); in gv100_fault_buffer_process()
47 const u32 timelo = nvkm_ro32(mem, base + 0x10); in gv100_fault_buffer_process()
48 const u32 timehi = nvkm_ro32(mem, base + 0x14); in gv100_fault_buffer_process()
49 const u32 info0 = nvkm_ro32(mem, base + 0x18); in gv100_fault_buffer_process()
50 const u32 info1 = nvkm_ro32(mem, base + 0x1c); in gv100_fault_buffer_process()
54 get = 0; in gv100_fault_buffer_process()
60 info.engine = (info0 & 0x000000ff); in gv100_fault_buffer_process()
61 info.valid = (info1 & 0x80000000) >> 31; in gv100_fault_buffer_process()
62 info.gpc = (info1 & 0x1f000000) >> 24; in gv100_fault_buffer_process()
63 info.hub = (info1 & 0x00100000) >> 20; in gv100_fault_buffer_process()
64 info.access = (info1 & 0x000f0000) >> 16; in gv100_fault_buffer_process()
65 info.client = (info1 & 0x00007f00) >> 8; in gv100_fault_buffer_process()
66 info.reason = (info1 & 0x0000001f); in gv100_fault_buffer_process()
77 const u32 intr = buffer->id ? 0x08000000 : 0x20000000; in gv100_fault_buffer_intr()
79 nvkm_mask(device, 0x100a2c, intr, intr); in gv100_fault_buffer_intr()
81 nvkm_mask(device, 0x100a34, intr, intr); in gv100_fault_buffer_intr()
88 const u32 foff = buffer->id * 0x14; in gv100_fault_buffer_fini()
89 nvkm_mask(device, 0x100e34 + foff, 0x80000000, 0x00000000); in gv100_fault_buffer_fini()
96 const u32 foff = buffer->id * 0x14; in gv100_fault_buffer_init()
98 nvkm_mask(device, 0x100e34 + foff, 0xc0000000, 0x40000000); in gv100_fault_buffer_init()
99 nvkm_wr32(device, 0x100e28 + foff, upper_32_bits(buffer->addr)); in gv100_fault_buffer_init()
100 nvkm_wr32(device, 0x100e24 + foff, lower_32_bits(buffer->addr)); in gv100_fault_buffer_init()
101 nvkm_mask(device, 0x100e34 + foff, 0x80000000, 0x80000000); in gv100_fault_buffer_init()
108 const u32 foff = buffer->id * 0x14; in gv100_fault_buffer_info()
110 nvkm_mask(device, 0x100e34 + foff, 0x40000000, 0x40000000); in gv100_fault_buffer_info()
112 buffer->entries = nvkm_rd32(device, 0x100e34 + foff) & 0x000fffff; in gv100_fault_buffer_info()
113 buffer->get = 0x100e2c + foff; in gv100_fault_buffer_info()
114 buffer->put = 0x100e30 + foff; in gv100_fault_buffer_info()
121 gv100_fault_buffer_process(fault->buffer[0]); in gv100_fault_ntfy_nrpfb()
131 const u32 addrlo = nvkm_rd32(device, 0x100e4c); in gv100_fault_intr_fault()
132 const u32 addrhi = nvkm_rd32(device, 0x100e50); in gv100_fault_intr_fault()
133 const u32 info0 = nvkm_rd32(device, 0x100e54); in gv100_fault_intr_fault()
134 const u32 insthi = nvkm_rd32(device, 0x100e58); in gv100_fault_intr_fault()
135 const u32 info1 = nvkm_rd32(device, 0x100e5c); in gv100_fault_intr_fault()
138 info.inst = ((u64)insthi << 32) | (info0 & 0xfffff000); in gv100_fault_intr_fault()
139 info.time = 0; in gv100_fault_intr_fault()
140 info.engine = (info0 & 0x000000ff); in gv100_fault_intr_fault()
141 info.valid = (info1 & 0x80000000) >> 31; in gv100_fault_intr_fault()
142 info.gpc = (info1 & 0x1f000000) >> 24; in gv100_fault_intr_fault()
143 info.hub = (info1 & 0x00100000) >> 20; in gv100_fault_intr_fault()
144 info.access = (info1 & 0x000f0000) >> 16; in gv100_fault_intr_fault()
145 info.client = (info1 & 0x00007f00) >> 8; in gv100_fault_intr_fault()
146 info.reason = (info1 & 0x0000001f); in gv100_fault_intr_fault()
156 u32 stat = nvkm_rd32(device, 0x100a20); in gv100_fault_intr()
158 if (stat & 0x80000000) { in gv100_fault_intr()
160 nvkm_wr32(device, 0x100e60, 0x80000000); in gv100_fault_intr()
161 stat &= ~0x80000000; in gv100_fault_intr()
164 if (stat & 0x20000000) { in gv100_fault_intr()
165 if (fault->buffer[0]) { in gv100_fault_intr()
166 nvkm_event_send(&fault->event, 1, 0, NULL, 0); in gv100_fault_intr()
167 stat &= ~0x20000000; in gv100_fault_intr()
171 if (stat & 0x08000000) { in gv100_fault_intr()
173 nvkm_event_send(&fault->event, 1, 1, NULL, 0); in gv100_fault_intr()
174 stat &= ~0x08000000; in gv100_fault_intr()
187 if (fault->buffer[0]) in gv100_fault_fini()
188 fault->func->buffer.fini(fault->buffer[0]); in gv100_fault_fini()
189 nvkm_mask(fault->subdev.device, 0x100a34, 0x80000000, 0x80000000); in gv100_fault_fini()
195 nvkm_mask(fault->subdev.device, 0x100a2c, 0x80000000, 0x80000000); in gv100_fault_init()
196 fault->func->buffer.init(fault->buffer[0]); in gv100_fault_init()
203 return nvkm_notify_init(&fault->buffer[0]->object, &fault->event, in gv100_fault_oneinit()
204 gv100_fault_ntfy_nrpfb, true, NULL, 0, 0, in gv100_fault_oneinit()
227 .user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 },