Lines Matching +full:0 +full:x60
28 { 0x140028, (const struct nvkm_specmux[]) {
29 { 0x3fff, 0, "unk0" },
30 { 0x7, 16, "unk16" },
31 { 0x3, 24, "unk24" },
32 { 0x2, 28, "unk28" },
35 { 0x14125c, (const struct nvkm_specmux[]) {
36 { 0x3fff, 0, "unk0" },
39 { 0x14165c, (const struct nvkm_specmux[]) {
40 { 0x3fff, 0, "unk0" },
43 { 0x141a5c, (const struct nvkm_specmux[]) {
44 { 0x3fff, 0, "unk0" },
47 { 0x141e5c, (const struct nvkm_specmux[]) {
48 { 0x3fff, 0, "unk0" },
56 { 0x5042c0, (const struct nvkm_specmux[]) {
57 { 0xf, 0, "sel0", true },
58 { 0x7, 8, "sel1", true },
61 { 0x5042c8, (const struct nvkm_specmux[]) {
62 { 0x1f, 0, "sel", true },
65 { 0x5042b8, (const struct nvkm_specmux[]) {
66 { 0xff, 0, "sel", true },
74 { 0x60, (const struct nvkm_specsig[]) {
75 { 0x47, "hub00_user_0" },
78 { 0x40, (const struct nvkm_specsig[]) {
79 { 0x27, "hub01_user_0" },
82 { 0x60, (const struct nvkm_specsig[]) {
83 { 0x47, "hub02_user_0" },
86 { 0x60, (const struct nvkm_specsig[]) {
87 { 0x47, "hub03_user_0" },
90 { 0x40, (const struct nvkm_specsig[]) {
91 { 0x03, "host_mmio_rd" },
92 { 0x27, "hub04_user_0" },
95 { 0x60, (const struct nvkm_specsig[]) {
96 { 0x47, "hub05_user_0" },
99 { 0xc0, (const struct nvkm_specsig[]) {
100 { 0x74, "host_fb_rd3x" },
101 { 0x75, "host_fb_rd3x_2" },
102 { 0xa7, "hub06_user_0" },
105 { 0x60, (const struct nvkm_specsig[]) {
106 { 0x47, "hub07_user_0" },
114 { 0xe0, (const struct nvkm_specsig[]) {
115 { 0xc7, "gpc00_user_0" },
118 { 0x20, (const struct nvkm_specsig[]) {
121 { 0x20, (const struct nvkm_specsig[]) {
122 { 0x00, "gpc02_tex_00", gk104_tex_sources },
123 { 0x01, "gpc02_tex_01", gk104_tex_sources },
124 { 0x02, "gpc02_tex_02", gk104_tex_sources },
125 { 0x03, "gpc02_tex_03", gk104_tex_sources },
126 { 0x04, "gpc02_tex_04", gk104_tex_sources },
127 { 0x05, "gpc02_tex_05", gk104_tex_sources },
128 { 0x06, "gpc02_tex_06", gk104_tex_sources },
129 { 0x07, "gpc02_tex_07", gk104_tex_sources },
130 { 0x08, "gpc02_tex_08", gk104_tex_sources },
131 { 0x0a, "gpc02_tex_0a", gk104_tex_sources },
132 { 0x0b, "gpc02_tex_0b", gk104_tex_sources },
133 { 0x0d, "gpc02_tex_0c", gk104_tex_sources },
134 { 0x0c, "gpc02_tex_0d", gk104_tex_sources },
135 { 0x0e, "gpc02_tex_0e", gk104_tex_sources },
136 { 0x0f, "gpc02_tex_0f", gk104_tex_sources },
137 { 0x10, "gpc02_tex_10", gk104_tex_sources },
138 { 0x11, "gpc02_tex_11", gk104_tex_sources },
139 { 0x12, "gpc02_tex_12", gk104_tex_sources },
147 { 0x60, (const struct nvkm_specsig[]) {
148 { 0x00, "part00_pbfb_00", gf100_pbfb_sources },
149 { 0x01, "part00_pbfb_01", gf100_pbfb_sources },
150 { 0x0c, "part00_pmfb_00", gk104_pmfb_sources },
151 { 0x0d, "part00_pmfb_01", gk104_pmfb_sources },
152 { 0x0e, "part00_pmfb_02", gk104_pmfb_sources },
153 { 0x0f, "part00_pmfb_03", gk104_pmfb_sources },
154 { 0x10, "part00_pmfb_04", gk104_pmfb_sources },
155 { 0x12, "part00_pmfb_05", gk104_pmfb_sources },
156 { 0x15, "part00_pmfb_06", gk104_pmfb_sources },
157 { 0x16, "part00_pmfb_07", gk104_pmfb_sources },
158 { 0x18, "part00_pmfb_08", gk104_pmfb_sources },
159 { 0x21, "part00_pmfb_09", gk104_pmfb_sources },
160 { 0x25, "part00_pmfb_0a", gk104_pmfb_sources },
161 { 0x26, "part00_pmfb_0b", gk104_pmfb_sources },
162 { 0x27, "part00_pmfb_0c", gk104_pmfb_sources },
163 { 0x47, "part00_user_0" },
166 { 0x60, (const struct nvkm_specsig[]) {
167 { 0x47, "part01_user_0" },