Lines Matching +full:0 +full:x610
32 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x730 + (sm * 0x80))); in gv100_gr_trap_sm()
33 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x734 + (sm * 0x80))); in gv100_gr_trap_sm()
38 warp = nvkm_enum_find(gf100_mp_warp_error, werr & 0xffff); in gv100_gr_trap_sm()
44 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x730 + sm * 0x80), 0x00000000); in gv100_gr_trap_sm()
45 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734 + sm * 0x80), gerr); in gv100_gr_trap_sm()
51 gv100_gr_trap_sm(gr, gpc, tpc, 0); in gv100_gr_trap_mp()
59 nvkm_mask(device, 0x4188a4, 0x03000000, 0x03000000); in gv100_gr_init_4188a4()
67 for (sm = 0; sm < 0x100; sm += 0x80) { in gv100_gr_init_shader_exceptions()
68 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x728 + sm), 0x0085eb64); in gv100_gr_init_shader_exceptions()
69 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x610), 0x00000001); in gv100_gr_init_shader_exceptions()
70 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x72c + sm), 0x00000004); in gv100_gr_init_shader_exceptions()
78 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0x403f0000); in gv100_gr_init_504430()
85 nvkm_mask(device, 0x419bd8, 0x00000700, 0x00000000); in gv100_gr_init_419bd8()
138 { 0, gm200_gr_load, &gv100_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },