Lines Matching +full:0 +full:x8000000a
6 #define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000
8 #define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001
10 #define NVIF_CLASS_PERFMON /* if0002.h */ -0x00000002
11 #define NVIF_CLASS_PERFDOM /* if0003.h */ -0x00000003
13 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -0x00000004
14 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -0x00000005
15 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x00000006
16 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x00000007
18 #define NVIF_CLASS_MMU /* if0008.h */ 0x80000008
19 #define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x80000009
20 #define NVIF_CLASS_MMU_NV50 /* if0008.h */ 0x80005009
21 #define NVIF_CLASS_MMU_GF100 /* if0008.h */ 0x80009009
23 #define NVIF_CLASS_MEM /* if000a.h */ 0x8000000a
24 #define NVIF_CLASS_MEM_NV04 /* if000b.h */ 0x8000000b
25 #define NVIF_CLASS_MEM_NV50 /* if500b.h */ 0x8000500b
26 #define NVIF_CLASS_MEM_GF100 /* if900b.h */ 0x8000900b
28 #define NVIF_CLASS_VMM /* if000c.h */ 0x8000000c
29 #define NVIF_CLASS_VMM_NV04 /* if000d.h */ 0x8000000d
30 #define NVIF_CLASS_VMM_NV50 /* if500d.h */ 0x8000500d
31 #define NVIF_CLASS_VMM_GF100 /* if900d.h */ 0x8000900d
32 #define NVIF_CLASS_VMM_GM200 /* ifb00d.h */ 0x8000b00d
33 #define NVIF_CLASS_VMM_GP100 /* ifc00d.h */ 0x8000c00d
35 #define NVIF_CLASS_DISP /* if0010.h */ 0x80000010
36 #define NVIF_CLASS_CONN /* if0011.h */ 0x80000011
37 #define NVIF_CLASS_OUTP /* if0012.h */ 0x80000012
38 #define NVIF_CLASS_DISP_CHAN /* if0014.h */ 0x80000014
41 #define NV_NULL_CLASS 0x00000030
43 #define NV_DEVICE /* cl0080.h */ 0x00000080
45 #define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002
46 #define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003
47 #define NV_DMA_IN_MEMORY /* cl0002.h */ 0x0000003d
49 #define NV50_TWOD 0x0000502d
50 #define FERMI_TWOD_A 0x0000902d
52 #define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039
53 #define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x00009039
55 #define KEPLER_INLINE_TO_MEMORY_A 0x0000a040
56 #define KEPLER_INLINE_TO_MEMORY_B 0x0000a140
58 #define NV04_DISP /* cl0046.h */ 0x00000046
60 #define VOLTA_USERMODE_A 0x0000c361
62 #define MAXWELL_FAULT_BUFFER_A /* clb069.h */ 0x0000b069
63 #define VOLTA_FAULT_BUFFER_A /* clb069.h */ 0x0000c369
65 #define NV03_CHANNEL_DMA /* cl506b.h */ 0x0000006b
66 #define NV10_CHANNEL_DMA /* cl506b.h */ 0x0000006e
67 #define NV17_CHANNEL_DMA /* cl506b.h */ 0x0000176e
68 #define NV40_CHANNEL_DMA /* cl506b.h */ 0x0000406e
70 #define NV50_CHANNEL_GPFIFO /* cl506f.h */ 0x0000506f
71 #define G82_CHANNEL_GPFIFO /* cl826f.h */ 0x0000826f
72 #define FERMI_CHANNEL_GPFIFO /* cl906f.h */ 0x0000906f
73 #define KEPLER_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000a06f
74 #define KEPLER_CHANNEL_GPFIFO_B /* cla06f.h */ 0x0000a16f
75 #define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f
76 #define PASCAL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c06f
77 #define VOLTA_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c36f
78 #define TURING_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c46f
79 #define AMPERE_CHANNEL_GPFIFO_B /* clc36f.h */ 0x0000c76f
81 #define NV50_DISP /* if0010.h */ 0x00005070
82 #define G82_DISP /* if0010.h */ 0x00008270
83 #define GT200_DISP /* if0010.h */ 0x00008370
84 #define GT214_DISP /* if0010.h */ 0x00008570
85 #define GT206_DISP /* if0010.h */ 0x00008870
86 #define GF110_DISP /* if0010.h */ 0x00009070
87 #define GK104_DISP /* if0010.h */ 0x00009170
88 #define GK110_DISP /* if0010.h */ 0x00009270
89 #define GM107_DISP /* if0010.h */ 0x00009470
90 #define GM200_DISP /* if0010.h */ 0x00009570
91 #define GP100_DISP /* if0010.h */ 0x00009770
92 #define GP102_DISP /* if0010.h */ 0x00009870
93 #define GV100_DISP /* if0010.h */ 0x0000c370
94 #define TU102_DISP /* if0010.h */ 0x0000c570
95 #define GA102_DISP /* if0010.h */ 0x0000c670
97 #define GV100_DISP_CAPS 0x0000c373
99 #define NV31_MPEG 0x00003174
100 #define G82_MPEG 0x00008274
102 #define NV74_VP2 0x00007476
104 #define NV50_DISP_CURSOR /* if0014.h */ 0x0000507a
105 #define G82_DISP_CURSOR /* if0014.h */ 0x0000827a
106 #define GT214_DISP_CURSOR /* if0014.h */ 0x0000857a
107 #define GF110_DISP_CURSOR /* if0014.h */ 0x0000907a
108 #define GK104_DISP_CURSOR /* if0014.h */ 0x0000917a
109 #define GV100_DISP_CURSOR /* if0014.h */ 0x0000c37a
110 #define TU102_DISP_CURSOR /* if0014.h */ 0x0000c57a
111 #define GA102_DISP_CURSOR /* if0014.h */ 0x0000c67a
113 #define NV50_DISP_OVERLAY /* if0014.h */ 0x0000507b
114 #define G82_DISP_OVERLAY /* if0014.h */ 0x0000827b
115 #define GT214_DISP_OVERLAY /* if0014.h */ 0x0000857b
116 #define GF110_DISP_OVERLAY /* if0014.h */ 0x0000907b
117 #define GK104_DISP_OVERLAY /* if0014.h */ 0x0000917b
119 #define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c37b
120 #define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c57b
121 #define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c67b
123 #define NV50_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000507c
124 #define G82_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000827c
125 #define GT200_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000837c
126 #define GT214_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000857c
127 #define GF110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000907c
128 #define GK104_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000917c
129 #define GK110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000927c
131 #define NV50_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000507d
132 #define G82_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000827d
133 #define GT200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000837d
134 #define GT214_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000857d
135 #define GT206_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000887d
136 #define GF110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000907d
137 #define GK104_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000917d
138 #define GK110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000927d
139 #define GM107_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000947d
140 #define GM200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000957d
141 #define GP100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000977d
142 #define GP102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000987d
143 #define GV100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c37d
144 #define TU102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c57d
145 #define GA102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c67d
147 #define NV50_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000507e
148 #define G82_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000827e
149 #define GT200_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000837e
150 #define GT214_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000857e
151 #define GF110_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000907e
152 #define GK104_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000917e
154 #define GV100_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c37e
155 #define TU102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c57e
156 #define GA102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c67e
158 #define NV50_TESLA 0x00005097
159 #define G82_TESLA 0x00008297
160 #define GT200_TESLA 0x00008397
161 #define GT214_TESLA 0x00008597
162 #define GT21A_TESLA 0x00008697
164 #define FERMI_A /* cl9097.h */ 0x00009097
165 #define FERMI_B /* cl9097.h */ 0x00009197
166 #define FERMI_C /* cl9097.h */ 0x00009297
168 #define KEPLER_A /* cl9097.h */ 0x0000a097
169 #define KEPLER_B /* cl9097.h */ 0x0000a197
170 #define KEPLER_C /* cl9097.h */ 0x0000a297
172 #define MAXWELL_A /* cl9097.h */ 0x0000b097
173 #define MAXWELL_B /* cl9097.h */ 0x0000b197
175 #define PASCAL_A /* cl9097.h */ 0x0000c097
176 #define PASCAL_B /* cl9097.h */ 0x0000c197
178 #define VOLTA_A /* cl9097.h */ 0x0000c397
180 #define TURING_A /* cl9097.h */ 0x0000c597
182 #define NV74_BSP 0x000074b0
184 #define GT212_MSVLD 0x000085b1
185 #define IGT21A_MSVLD 0x000086b1
186 #define G98_MSVLD 0x000088b1
187 #define GF100_MSVLD 0x000090b1
188 #define GK104_MSVLD 0x000095b1
190 #define GT212_MSPDEC 0x000085b2
191 #define G98_MSPDEC 0x000088b2
192 #define GF100_MSPDEC 0x000090b2
193 #define GK104_MSPDEC 0x000095b2
195 #define GT212_MSPPP 0x000085b3
196 #define G98_MSPPP 0x000088b3
197 #define GF100_MSPPP 0x000090b3
199 #define G98_SEC 0x000088b4
201 #define GT212_DMA 0x000085b5
202 #define FERMI_DMA 0x000090b5
203 #define KEPLER_DMA_COPY_A 0x0000a0b5
204 #define MAXWELL_DMA_COPY_A 0x0000b0b5
205 #define PASCAL_DMA_COPY_A 0x0000c0b5
206 #define PASCAL_DMA_COPY_B 0x0000c1b5
207 #define VOLTA_DMA_COPY_A 0x0000c3b5
208 #define TURING_DMA_COPY_A 0x0000c5b5
209 #define AMPERE_DMA_COPY_B 0x0000c7b5
211 #define FERMI_DECOMPRESS 0x000090b8
213 #define NV50_COMPUTE 0x000050c0
214 #define GT214_COMPUTE 0x000085c0
215 #define FERMI_COMPUTE_A 0x000090c0
216 #define FERMI_COMPUTE_B 0x000091c0
217 #define KEPLER_COMPUTE_A 0x0000a0c0
218 #define KEPLER_COMPUTE_B 0x0000a1c0
219 #define MAXWELL_COMPUTE_A 0x0000b0c0
220 #define MAXWELL_COMPUTE_B 0x0000b1c0
221 #define PASCAL_COMPUTE_A 0x0000c0c0
222 #define PASCAL_COMPUTE_B 0x0000c1c0
223 #define VOLTA_COMPUTE_A 0x0000c3c0
224 #define TURING_COMPUTE_A 0x0000c5c0
226 #define NV74_CIPHER 0x000074c1