56 		writel(CSC0_COEF0_A2(0x096) | CSC0_COEF0_A1(0x04c),  in lcdif_set_formats()
58 		writel(CSC0_COEF1_B1(0x7d5) | CSC0_COEF1_A3(0x01d),  in lcdif_set_formats()
60 		writel(CSC0_COEF2_B3(0x080) | CSC0_COEF2_B2(0x7ac),  in lcdif_set_formats()
62 		writel(CSC0_COEF3_C2(0x795) | CSC0_COEF3_C1(0x080),  in lcdif_set_formats()
64 		writel(CSC0_COEF4_D1(0x000) | CSC0_COEF4_C3(0x7ec),  in lcdif_set_formats()
66 		writel(CSC0_COEF5_D3(0x080) | CSC0_COEF5_D2(0x080),  in lcdif_set_formats()
74 		dev_err(drm->dev, "Unknown media bus format 0x%x\n", bus_format);  in lcdif_set_formats()
104 		dev_err(drm->dev, "Unknown pixel format 0x%x\n", format);  in lcdif_set_formats()
112 	u32 ctrl = 0;  in lcdif_set_mode()
145 	writel(CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]),  in lcdif_set_mode()
173 				 0, 36000);	/* Wait ~2 frame times max */  in lcdif_disable_controller()
196 	u32 bus_flags = 0;  in lcdif_crtc_mode_set_nofb()
206 	DRM_DEV_DEBUG_DRIVER(drm->dev, "Bridge bus_flags: 0x%08X\n",  in lcdif_crtc_mode_set_nofb()
208 	DRM_DEV_DEBUG_DRIVER(drm->dev, "Mode flags: 0x%08X\n", m->flags);  in lcdif_crtc_mode_set_nofb()
251 	if (drm_crtc_vblank_get(crtc) == 0)  in lcdif_crtc_atomic_flush()
267 	u32 bus_format = 0;  in lcdif_crtc_atomic_enable()
299 	paddr = drm_fb_dma_get_gem_addr(new_pstate->fb, new_pstate, 0);  in lcdif_crtc_atomic_enable()
341 	return 0;  in lcdif_crtc_enable_vblank()
349 	writel(0, lcdif->base + LCDC_V8_INT_ENABLE_D0);  in lcdif_crtc_disable_vblank()
408 	paddr = drm_fb_dma_get_gem_addr(new_pstate->fb, new_pstate, 0);  in lcdif_plane_primary_atomic_update()