23 	/* Check that the GMU is idle */  in _a6xx_check_idle()
24 	if (!a6xx_gmu_isidle(&a6xx_gpu->gmu))  in _a6xx_check_idle()
186 	 * For PM4 the GMU register offsets are calculated from the base of the  in a6xx_submit()
596 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;  in a6xx_set_hwcg()  local
616 	gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 1, 0);  in a6xx_set_hwcg()
622 	gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 0, 1);  in a6xx_set_hwcg()
988 	/* Make sure the GMU keeps the GPU on while we set it up */  in hw_init()
989 	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);  in hw_init()
1229 	 * Tell the GMU that we are done touching the GPU and it can start power  in hw_init()
1232 	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);  in hw_init()
1234 	if (a6xx_gpu->gmu.legacy) {  in hw_init()
1235 		/* Take the GMU out of its special boot mode */  in hw_init()
1236 		a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_BOOT_SLUMBER);  in hw_init()
1248 	mutex_lock(&a6xx_gpu->gmu.lock);  in a6xx_hw_init()
1250 	mutex_unlock(&a6xx_gpu->gmu.lock);  in a6xx_hw_init()
1287 	gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0);  in a6xx_recover()
1494 	gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 1);  in a6xx_fault_detect_irq()
1665 	mutex_lock(&a6xx_gpu->gmu.lock);  in a6xx_pm_resume()
1667 	mutex_unlock(&a6xx_gpu->gmu.lock);  in a6xx_pm_resume()
1690 	mutex_lock(&a6xx_gpu->gmu.lock);  in a6xx_pm_suspend()
1692 	mutex_unlock(&a6xx_gpu->gmu.lock);  in a6xx_pm_suspend()
1710 	mutex_lock(&a6xx_gpu->gmu.lock);  in a6xx_get_timestamp()
1713 	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);  in a6xx_get_timestamp()
1718 	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);  in a6xx_get_timestamp()
1720 	mutex_unlock(&a6xx_gpu->gmu.lock);  in a6xx_get_timestamp()
1766 	busy_cycles = gmu_read64(&a6xx_gpu->gmu,  in a6xx_gpu_busy()
1779 	mutex_lock(&a6xx_gpu->gmu.lock);  in a6xx_gpu_set_freq()
1781 	mutex_unlock(&a6xx_gpu->gmu.lock);  in a6xx_gpu_set_freq()
2029 	/* Check if there is a GMU phandle and set it up */  in a6xx_gpu_init()
2030 	node = of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0);  in a6xx_gpu_init()