12 static inline bool try_preempt_state(struct a5xx_gpu *a5xx_gpu,  in try_preempt_state()  argument
15 	enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state,  in try_preempt_state()
25 static inline void set_preempt_state(struct a5xx_gpu *gpu,  in set_preempt_state()
78 	struct a5xx_gpu *a5xx_gpu = from_timer(a5xx_gpu, t, preempt_timer);  in a5xx_preempt_timer()  local
79 	struct msm_gpu *gpu = &a5xx_gpu->base.base;  in a5xx_preempt_timer()
82 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_FAULTED))  in a5xx_preempt_timer()
93 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_trigger()  local
104 	if (!try_preempt_state(a5xx_gpu, PREEMPT_NONE, PREEMPT_START))  in a5xx_preempt_trigger()
114 	if (!ring || (a5xx_gpu->cur_ring == ring)) {  in a5xx_preempt_trigger()
127 		set_preempt_state(a5xx_gpu, PREEMPT_ABORT);  in a5xx_preempt_trigger()
128 		update_wptr(gpu, a5xx_gpu->cur_ring);  in a5xx_preempt_trigger()
129 		set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_trigger()
135 	a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring);  in a5xx_preempt_trigger()
141 		a5xx_gpu->preempt_iova[ring->id]);  in a5xx_preempt_trigger()
143 	a5xx_gpu->next_ring = ring;  in a5xx_preempt_trigger()
146 	mod_timer(&a5xx_gpu->preempt_timer, jiffies + msecs_to_jiffies(10000));  in a5xx_preempt_trigger()
149 	set_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED);  in a5xx_preempt_trigger()
162 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_irq()  local
165 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_PENDING))  in a5xx_preempt_irq()
169 	del_timer(&a5xx_gpu->preempt_timer);  in a5xx_preempt_irq()
179 		set_preempt_state(a5xx_gpu, PREEMPT_FAULTED);  in a5xx_preempt_irq()
186 	a5xx_gpu->cur_ring = a5xx_gpu->next_ring;  in a5xx_preempt_irq()
187 	a5xx_gpu->next_ring = NULL;  in a5xx_preempt_irq()
189 	update_wptr(gpu, a5xx_gpu->cur_ring);  in a5xx_preempt_irq()
191 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_irq()
197 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_hw_init()  local
201 	a5xx_gpu->cur_ring = gpu->rb[0];  in a5xx_preempt_hw_init()
208 		a5xx_gpu->preempt[i]->wptr = 0;  in a5xx_preempt_hw_init()
209 		a5xx_gpu->preempt[i]->rptr = 0;  in a5xx_preempt_hw_init()
210 		a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;  in a5xx_preempt_hw_init()
218 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_hw_init()
221 static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu,  in preempt_init_ring()  argument
224 	struct adreno_gpu *adreno_gpu = &a5xx_gpu->base;  in preempt_init_ring()
250 	a5xx_gpu->preempt_bo[ring->id] = bo;  in preempt_init_ring()
251 	a5xx_gpu->preempt_counters_bo[ring->id] = counters_bo;  in preempt_init_ring()
252 	a5xx_gpu->preempt_iova[ring->id] = iova;  in preempt_init_ring()
253 	a5xx_gpu->preempt[ring->id] = ptr;  in preempt_init_ring()
262 	ptr->rptr_addr = shadowptr(a5xx_gpu, ring);  in preempt_init_ring()
271 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_fini()  local
275 		msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace);  in a5xx_preempt_fini()
276 		msm_gem_kernel_put(a5xx_gpu->preempt_counters_bo[i], gpu->aspace);  in a5xx_preempt_fini()
283 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_init()  local
291 		if (preempt_init_ring(a5xx_gpu, gpu->rb[i])) {  in a5xx_preempt_init()
303 	timer_setup(&a5xx_gpu->preempt_timer, a5xx_preempt_timer, 0);  in a5xx_preempt_init()