24 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in update_shadow_rptr()  local
26 	if (a5xx_gpu->has_whereami) {  in update_shadow_rptr()
28 		OUT_RING(ring, lower_32_bits(shadowptr(a5xx_gpu, ring)));  in update_shadow_rptr()
29 		OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring)));  in update_shadow_rptr()
37 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_flush()  local
62 	if (a5xx_gpu->cur_ring == ring && !a5xx_in_preempt(a5xx_gpu))  in a5xx_flush()
127 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_submit()  local
146 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));  in a5xx_submit()
147 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));  in a5xx_submit()
510 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_start()  local
522 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id]));  in a5xx_preempt_start()
523 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id]));  in a5xx_preempt_start()
551 static void a5xx_ucode_check_version(struct a5xx_gpu *a5xx_gpu,  in a5xx_ucode_check_version()  argument
565 		a5xx_gpu->has_whereami = true;  in a5xx_ucode_check_version()
573 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_ucode_init()  local
576 	if (!a5xx_gpu->pm4_bo) {  in a5xx_ucode_init()
577 		a5xx_gpu->pm4_bo = adreno_fw_create_bo(gpu,  in a5xx_ucode_init()
578 			adreno_gpu->fw[ADRENO_FW_PM4], &a5xx_gpu->pm4_iova);  in a5xx_ucode_init()
581 		if (IS_ERR(a5xx_gpu->pm4_bo)) {  in a5xx_ucode_init()
582 			ret = PTR_ERR(a5xx_gpu->pm4_bo);  in a5xx_ucode_init()
583 			a5xx_gpu->pm4_bo = NULL;  in a5xx_ucode_init()
589 		msm_gem_object_set_name(a5xx_gpu->pm4_bo, "pm4fw");  in a5xx_ucode_init()
592 	if (!a5xx_gpu->pfp_bo) {  in a5xx_ucode_init()
593 		a5xx_gpu->pfp_bo = adreno_fw_create_bo(gpu,  in a5xx_ucode_init()
594 			adreno_gpu->fw[ADRENO_FW_PFP], &a5xx_gpu->pfp_iova);  in a5xx_ucode_init()
596 		if (IS_ERR(a5xx_gpu->pfp_bo)) {  in a5xx_ucode_init()
597 			ret = PTR_ERR(a5xx_gpu->pfp_bo);  in a5xx_ucode_init()
598 			a5xx_gpu->pfp_bo = NULL;  in a5xx_ucode_init()
604 		msm_gem_object_set_name(a5xx_gpu->pfp_bo, "pfpfw");  in a5xx_ucode_init()
605 		a5xx_ucode_check_version(a5xx_gpu, a5xx_gpu->pfp_bo);  in a5xx_ucode_init()
609 		REG_A5XX_CP_ME_INSTR_BASE_HI, a5xx_gpu->pm4_iova);  in a5xx_ucode_init()
612 		REG_A5XX_CP_PFP_INSTR_BASE_HI, a5xx_gpu->pfp_iova);  in a5xx_ucode_init()
673 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_hw_init()  local
924 	if (a5xx_gpu->has_whereami) {  in a5xx_hw_init()
925 		if (!a5xx_gpu->shadow_bo) {  in a5xx_hw_init()
926 			a5xx_gpu->shadow = msm_gem_kernel_new(gpu->dev,  in a5xx_hw_init()
929 				gpu->aspace, &a5xx_gpu->shadow_bo,  in a5xx_hw_init()
930 				&a5xx_gpu->shadow_iova);  in a5xx_hw_init()
932 			if (IS_ERR(a5xx_gpu->shadow))  in a5xx_hw_init()
933 				return PTR_ERR(a5xx_gpu->shadow);  in a5xx_hw_init()
935 			msm_gem_object_set_name(a5xx_gpu->shadow_bo, "shadow");  in a5xx_hw_init()
939 			REG_A5XX_CP_RB_RPTR_ADDR_HI, shadowptr(a5xx_gpu, gpu->rb[0]));  in a5xx_hw_init()
1033 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_destroy()  local
1039 	if (a5xx_gpu->pm4_bo) {  in a5xx_destroy()
1040 		msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace);  in a5xx_destroy()
1041 		drm_gem_object_put(a5xx_gpu->pm4_bo);  in a5xx_destroy()
1044 	if (a5xx_gpu->pfp_bo) {  in a5xx_destroy()
1045 		msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace);  in a5xx_destroy()
1046 		drm_gem_object_put(a5xx_gpu->pfp_bo);  in a5xx_destroy()
1049 	if (a5xx_gpu->gpmu_bo) {  in a5xx_destroy()
1050 		msm_gem_unpin_iova(a5xx_gpu->gpmu_bo, gpu->aspace);  in a5xx_destroy()
1051 		drm_gem_object_put(a5xx_gpu->gpmu_bo);  in a5xx_destroy()
1054 	if (a5xx_gpu->shadow_bo) {  in a5xx_destroy()
1055 		msm_gem_unpin_iova(a5xx_gpu->shadow_bo, gpu->aspace);  in a5xx_destroy()
1056 		drm_gem_object_put(a5xx_gpu->shadow_bo);  in a5xx_destroy()
1060 	kfree(a5xx_gpu);  in a5xx_destroy()
1079 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_idle()  local
1081 	if (ring != a5xx_gpu->cur_ring) {  in a5xx_idle()
1392 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_pm_suspend()  local
1421 	if (a5xx_gpu->has_whereami)  in a5xx_pm_suspend()
1423 			a5xx_gpu->shadow[i] = 0;  in a5xx_pm_suspend()
1660 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_active_ring()  local
1662 	return a5xx_gpu->cur_ring;  in a5xx_active_ring()
1679 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_get_rptr()  local
1681 	if (a5xx_gpu->has_whereami)  in a5xx_get_rptr()
1682 		return a5xx_gpu->shadow[ring->id];  in a5xx_get_rptr()
1750 	struct a5xx_gpu *a5xx_gpu = NULL;  in a5xx_gpu_init()  local
1760 	a5xx_gpu = kzalloc(sizeof(*a5xx_gpu), GFP_KERNEL);  in a5xx_gpu_init()
1761 	if (!a5xx_gpu)  in a5xx_gpu_init()
1764 	adreno_gpu = &a5xx_gpu->base;  in a5xx_gpu_init()
1769 	a5xx_gpu->lm_leakage = 0x4E001A;  in a5xx_gpu_init()
1775 		a5xx_destroy(&(a5xx_gpu->base.base));  in a5xx_gpu_init()