Lines Matching +full:0 +full:x3c00
35 #define DRIVER_MINOR 0
36 #define DRIVER_PATCHLEVEL 0
43 #define MGA_BIOS_OFFSET 0x7ffc
45 #define ATTR_INDEX 0x1fc0
46 #define ATTR_DATA 0x1fc1
62 } while (0)
66 RREG8(0x1fda); \
69 } while (0) \
75 } while (0) \
81 } while (0) \
87 } while (0) \
93 } while (0) \
99 } while (0) \
105 } while (0) \
107 #define GFX_INDEX 0x1fce
108 #define GFX_DATA 0x1fcf
114 } while (0) \
116 #define DAC_INDEX 0x3c00
117 #define DAC_DATA 0x3c0a
123 } while (0) \
125 #define MGA_MISC_OUT 0x1fc2
126 #define MGA_MISC_IN 0x1fcc
135 /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, \
136 /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, \
137 /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, \
138 /* 0x18: */ (xvrefctrl), \
139 /* 0x19: */ 0, \
140 /* 0x1a: */ (xpixclkctrl), \
141 /* 0x1b: */ 0xff, 0xbf, 0x20, \
142 /* 0x1e: */ (xmiscctrl), \
143 /* 0x1f: */ 0x20, \
144 /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
145 /* 0x28: */ 0x00, 0x00, 0x00, 0x00, \
146 /* 0x2c: */ (xsyspllm), \
147 /* 0x2d: */ (xsysplln), \
148 /* 0x2e: */ (xsyspllp), \
149 /* 0x2f: */ 0x40, \
150 /* 0x30: */ 0x00, 0xb0, 0x00, 0xc2, 0x34, 0x14, 0x02, 0x83, \
151 /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3a, \
152 /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, \
153 /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 \
170 * S = [0..3]
233 * it's value to 0.
324 /* SE model number stored in reg 0x1e24 */