1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
10 #include <linux/soc/mediatek/mtk-cmdq.h>
11 #include <linux/soc/mediatek/mtk-mmsys.h>
12 #include <linux/soc/mediatek/mtk-mutex.h>
28  * struct mtk_drm_crtc - MediaTek specific crtc structure.
91 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_finish_page_flip()
94 	spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
95 	drm_crtc_send_vblank_event(crtc, mtk_crtc->event);  in mtk_drm_crtc_finish_page_flip()
97 	mtk_crtc->event = NULL;  in mtk_drm_crtc_finish_page_flip()
98 	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
103 	drm_crtc_handle_vblank(&mtk_crtc->base);  in mtk_drm_finish_page_flip()
104 	if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {  in mtk_drm_finish_page_flip()
106 		mtk_crtc->pending_needs_vblank = false;  in mtk_drm_finish_page_flip()
117 	pkt->va_base = kzalloc(size, GFP_KERNEL);  in mtk_drm_cmdq_pkt_create()
118 	if (!pkt->va_base) {  in mtk_drm_cmdq_pkt_create()
120 		return -ENOMEM;  in mtk_drm_cmdq_pkt_create()
122 	pkt->buf_size = size;  in mtk_drm_cmdq_pkt_create()
123 	pkt->cl = (void *)client;  in mtk_drm_cmdq_pkt_create()
125 	dev = client->chan->mbox->dev;  in mtk_drm_cmdq_pkt_create()
126 	dma_addr = dma_map_single(dev, pkt->va_base, pkt->buf_size,  in mtk_drm_cmdq_pkt_create()
130 		kfree(pkt->va_base);  in mtk_drm_cmdq_pkt_create()
132 		return -ENOMEM;  in mtk_drm_cmdq_pkt_create()
135 	pkt->pa_base = dma_addr;  in mtk_drm_cmdq_pkt_create()
142 	struct cmdq_client *client = (struct cmdq_client *)pkt->cl;  in mtk_drm_cmdq_pkt_destroy()
144 	dma_unmap_single(client->chan->mbox->dev, pkt->pa_base, pkt->buf_size,  in mtk_drm_cmdq_pkt_destroy()
146 	kfree(pkt->va_base);  in mtk_drm_cmdq_pkt_destroy()
156 	mtk_mutex_put(mtk_crtc->mutex);  in mtk_drm_crtc_destroy()
158 	mtk_drm_cmdq_pkt_destroy(&mtk_crtc->cmdq_handle);  in mtk_drm_crtc_destroy()
160 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_destroy()
161 		mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_destroy()
162 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_destroy()
166 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_destroy()
169 		comp = mtk_crtc->ddp_comp[i];  in mtk_drm_crtc_destroy()
180 	if (crtc->state)  in mtk_drm_crtc_reset()
181 		__drm_atomic_helper_crtc_destroy_state(crtc->state);  in mtk_drm_crtc_reset()
183 	kfree(to_mtk_crtc_state(crtc->state));  in mtk_drm_crtc_reset()
184 	crtc->state = NULL;  in mtk_drm_crtc_reset()
188 		__drm_atomic_helper_crtc_reset(crtc, &state->base);  in mtk_drm_crtc_reset()
199 	__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);  in mtk_drm_crtc_duplicate_state()
201 	WARN_ON(state->base.crtc != crtc);  in mtk_drm_crtc_duplicate_state()
202 	state->base.crtc = crtc;  in mtk_drm_crtc_duplicate_state()
203 	state->pending_config = false;  in mtk_drm_crtc_duplicate_state()
205 	return &state->base;  in mtk_drm_crtc_duplicate_state()
225 	struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);  in mtk_drm_crtc_mode_set_nofb()
227 	state->pending_width = crtc->mode.hdisplay;  in mtk_drm_crtc_mode_set_nofb()
228 	state->pending_height = crtc->mode.vdisplay;  in mtk_drm_crtc_mode_set_nofb()
229 	state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);  in mtk_drm_crtc_mode_set_nofb()
231 	state->pending_config = true;  in mtk_drm_crtc_mode_set_nofb()
239 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_clk_enable()
240 		ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
249 	while (--i >= 0)  in mtk_crtc_ddp_clk_enable()
250 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
258 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_clk_disable()
259 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_disable()
270 	unsigned int local_index = plane - mtk_crtc->planes;  in mtk_drm_ddp_comp_for_plane()
272 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_ddp_comp_for_plane()
273 		comp = mtk_crtc->ddp_comp[i];  in mtk_drm_ddp_comp_for_plane()
275 			*local_layer = local_index - count;  in mtk_drm_ddp_comp_for_plane()
281 	WARN(1, "Failed to find component for plane %d\n", plane->index);  in mtk_drm_ddp_comp_for_plane()
294 	if (data->sta < 0)  in ddp_cmdq_cb()
297 	state = to_mtk_crtc_state(mtk_crtc->base.state);  in ddp_cmdq_cb()
299 	state->pending_config = false;  in ddp_cmdq_cb()
301 	if (mtk_crtc->pending_planes) {  in ddp_cmdq_cb()
302 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
303 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
306 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
308 			plane_state->pending.config = false;  in ddp_cmdq_cb()
310 		mtk_crtc->pending_planes = false;  in ddp_cmdq_cb()
313 	if (mtk_crtc->pending_async_planes) {  in ddp_cmdq_cb()
314 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
315 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
318 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
320 			plane_state->pending.async_config = false;  in ddp_cmdq_cb()
322 		mtk_crtc->pending_async_planes = false;  in ddp_cmdq_cb()
325 	mtk_crtc->cmdq_vblank_cnt = 0;  in ddp_cmdq_cb()
326 	wake_up(&mtk_crtc->cb_blocking_queue);  in ddp_cmdq_cb()
332 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_init()
340 	if (WARN_ON(!crtc->state))  in mtk_crtc_ddp_hw_init()
341 		return -EINVAL;  in mtk_crtc_ddp_hw_init()
343 	width = crtc->state->adjusted_mode.hdisplay;  in mtk_crtc_ddp_hw_init()
344 	height = crtc->state->adjusted_mode.vdisplay;  in mtk_crtc_ddp_hw_init()
345 	vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);  in mtk_crtc_ddp_hw_init()
347 	drm_for_each_encoder(encoder, crtc->dev) {  in mtk_crtc_ddp_hw_init()
348 		if (encoder->crtc != crtc)  in mtk_crtc_ddp_hw_init()
351 		drm_connector_list_iter_begin(crtc->dev, &conn_iter);  in mtk_crtc_ddp_hw_init()
353 			if (connector->encoder != encoder)  in mtk_crtc_ddp_hw_init()
355 			if (connector->display_info.bpc != 0 &&  in mtk_crtc_ddp_hw_init()
356 			    bpc > connector->display_info.bpc)  in mtk_crtc_ddp_hw_init()
357 				bpc = connector->display_info.bpc;  in mtk_crtc_ddp_hw_init()
362 	ret = pm_runtime_resume_and_get(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
368 	ret = mtk_mutex_prepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
380 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_init()
381 		mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
382 				      mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_init()
383 				      mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_init()
384 		mtk_mutex_add_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_init()
385 					mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
387 	mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
388 	mtk_mutex_enable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
390 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_init()
391 		struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];  in mtk_crtc_ddp_hw_init()
401 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_hw_init()
402 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_hw_init()
407 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_hw_init()
417 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
419 	pm_runtime_put(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
425 	struct drm_device *drm = mtk_crtc->base.dev;  in mtk_crtc_ddp_hw_fini()
426 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_fini()
429 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_fini()
430 		mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
432 			mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
435 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_hw_fini()
436 		mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
437 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
438 	mtk_mutex_disable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
439 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_fini()
440 		mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
441 					 mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_fini()
442 					 mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_fini()
443 		mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
444 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
446 	mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
448 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
450 	pm_runtime_put(drm->dev);  in mtk_crtc_ddp_hw_fini()
452 	if (crtc->state->event && !crtc->state->active) {  in mtk_crtc_ddp_hw_fini()
453 		spin_lock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
454 		drm_crtc_send_vblank_event(crtc, crtc->state->event);  in mtk_crtc_ddp_hw_fini()
455 		crtc->state->event = NULL;  in mtk_crtc_ddp_hw_fini()
456 		spin_unlock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
464 	struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);  in mtk_crtc_ddp_config()
465 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_ddp_config()
474 	if (state->pending_config) {  in mtk_crtc_ddp_config()
475 		mtk_ddp_comp_config(comp, state->pending_width,  in mtk_crtc_ddp_config()
476 				    state->pending_height,  in mtk_crtc_ddp_config()
477 				    state->pending_vrefresh, 0,  in mtk_crtc_ddp_config()
481 			state->pending_config = false;  in mtk_crtc_ddp_config()
484 	if (mtk_crtc->pending_planes) {  in mtk_crtc_ddp_config()
485 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
486 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
489 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
491 			if (!plane_state->pending.config)  in mtk_crtc_ddp_config()
502 				plane_state->pending.config = false;  in mtk_crtc_ddp_config()
506 			mtk_crtc->pending_planes = false;  in mtk_crtc_ddp_config()
509 	if (mtk_crtc->pending_async_planes) {  in mtk_crtc_ddp_config()
510 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
511 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
514 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
516 			if (!plane_state->pending.async_config)  in mtk_crtc_ddp_config()
527 				plane_state->pending.async_config = false;  in mtk_crtc_ddp_config()
531 			mtk_crtc->pending_async_planes = false;  in mtk_crtc_ddp_config()
539 	struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;  in mtk_drm_crtc_update_config()
541 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_update_config()
542 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_drm_crtc_update_config()
546 	mutex_lock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
547 	mtk_crtc->config_updating = true;  in mtk_drm_crtc_update_config()
549 		mtk_crtc->pending_needs_vblank = true;  in mtk_drm_crtc_update_config()
551 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_update_config()
552 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_update_config()
555 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_update_config()
556 		if (plane_state->pending.dirty) {  in mtk_drm_crtc_update_config()
557 			plane_state->pending.config = true;  in mtk_drm_crtc_update_config()
558 			plane_state->pending.dirty = false;  in mtk_drm_crtc_update_config()
560 		} else if (plane_state->pending.async_dirty) {  in mtk_drm_crtc_update_config()
561 			plane_state->pending.async_config = true;  in mtk_drm_crtc_update_config()
562 			plane_state->pending.async_dirty = false;  in mtk_drm_crtc_update_config()
567 		mtk_crtc->pending_planes = true;  in mtk_drm_crtc_update_config()
569 		mtk_crtc->pending_async_planes = true;  in mtk_drm_crtc_update_config()
571 	if (priv->data->shadow_register) {  in mtk_drm_crtc_update_config()
572 		mtk_mutex_acquire(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
574 		mtk_mutex_release(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
577 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_update_config()
578 		mbox_flush(mtk_crtc->cmdq_client.chan, 2000);  in mtk_drm_crtc_update_config()
579 		cmdq_handle->cmd_buf_size = 0;  in mtk_drm_crtc_update_config()
580 		cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);  in mtk_drm_crtc_update_config()
581 		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);  in mtk_drm_crtc_update_config()
584 		dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev,  in mtk_drm_crtc_update_config()
585 					   cmdq_handle->pa_base,  in mtk_drm_crtc_update_config()
586 					   cmdq_handle->cmd_buf_size,  in mtk_drm_crtc_update_config()
595 		mtk_crtc->cmdq_vblank_cnt = 3;  in mtk_drm_crtc_update_config()
597 		mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle);  in mtk_drm_crtc_update_config()
598 		mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0);  in mtk_drm_crtc_update_config()
601 	mtk_crtc->config_updating = false;  in mtk_drm_crtc_update_config()
602 	mutex_unlock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
609 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_crtc_ddp_irq()
612 	if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan)  in mtk_crtc_ddp_irq()
614 	else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt == 0)  in mtk_crtc_ddp_irq()
616 			  drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_ddp_irq()
618 	if (!priv->data->shadow_register)  in mtk_crtc_ddp_irq()
627 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_enable_vblank()
637 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_disable_vblank()
659 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_async_update()
669 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_enable()
672 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_enable()
674 	ret = pm_runtime_resume_and_get(comp->dev);  in mtk_drm_crtc_atomic_enable()
676 		DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret);  in mtk_drm_crtc_atomic_enable()
682 		pm_runtime_put(comp->dev);  in mtk_drm_crtc_atomic_enable()
687 	mtk_crtc->enabled = true;  in mtk_drm_crtc_atomic_enable()
694 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_disable()
697 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_disable()
698 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_atomic_disable()
702 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_atomic_disable()
703 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_atomic_disable()
706 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_atomic_disable()
707 		plane_state->pending.enable = false;  in mtk_drm_crtc_atomic_disable()
708 		plane_state->pending.config = true;  in mtk_drm_crtc_atomic_disable()
710 	mtk_crtc->pending_planes = true;  in mtk_drm_crtc_atomic_disable()
715 	if (mtk_crtc->cmdq_client.chan)  in mtk_drm_crtc_atomic_disable()
716 		wait_event_timeout(mtk_crtc->cb_blocking_queue,  in mtk_drm_crtc_atomic_disable()
717 				   mtk_crtc->cmdq_vblank_cnt == 0,  in mtk_drm_crtc_atomic_disable()
725 	ret = pm_runtime_put(comp->dev);  in mtk_drm_crtc_atomic_disable()
727 		DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret);  in mtk_drm_crtc_atomic_disable()
729 	mtk_crtc->enabled = false;  in mtk_drm_crtc_atomic_disable()
740 	if (mtk_crtc->event && mtk_crtc_state->base.event)  in mtk_drm_crtc_atomic_begin()
743 	if (mtk_crtc_state->base.event) {  in mtk_drm_crtc_atomic_begin()
744 		mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);  in mtk_drm_crtc_atomic_begin()
746 		mtk_crtc->event = mtk_crtc_state->base.event;  in mtk_drm_crtc_atomic_begin()
747 		mtk_crtc_state->base.event = NULL;  in mtk_drm_crtc_atomic_begin()
757 	if (crtc->state->color_mgmt_changed)  in mtk_drm_crtc_atomic_flush()
758 		for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_atomic_flush()
759 			mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
760 			mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
762 	mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);  in mtk_drm_crtc_atomic_flush()
793 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_init()
794 		if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY)  in mtk_drm_crtc_init()
795 			primary = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
796 		else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR)  in mtk_drm_crtc_init()
797 			cursor = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
800 	ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor,  in mtk_drm_crtc_init()
805 	drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs);  in mtk_drm_crtc_init()
810 	drm_crtc_cleanup(&mtk_crtc->base);  in mtk_drm_crtc_init()
822 	comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_num_comp_planes()
823 	if (!comp->funcs)  in mtk_drm_crtc_num_comp_planes()
826 	if (comp_idx == 1 && !comp->funcs->bgclr_in_on)  in mtk_drm_crtc_num_comp_planes()
838 	else if (plane_idx == (num_planes - 1))  in mtk_drm_crtc_plane_type()
850 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_init_comp_planes()
855 				&mtk_crtc->planes[mtk_crtc->layer_nr],  in mtk_drm_crtc_init_comp_planes()
857 				mtk_drm_crtc_plane_type(mtk_crtc->layer_nr,  in mtk_drm_crtc_init_comp_planes()
863 		mtk_crtc->layer_nr++;  in mtk_drm_crtc_init_comp_planes()
871 	struct mtk_drm_private *priv = drm_dev->dev_private;  in mtk_drm_crtc_create()
872 	struct device *dev = drm_dev->dev;  in mtk_drm_crtc_create()
875 	int pipe = priv->num_pipes;  in mtk_drm_crtc_create()
889 		node = priv->comp_node[comp_id];  in mtk_drm_crtc_create()
890 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
899 		if (!comp->dev) {  in mtk_drm_crtc_create()
901 			return -ENODEV;  in mtk_drm_crtc_create()
907 		return -ENOMEM;  in mtk_drm_crtc_create()
909 	mtk_crtc->mmsys_dev = priv->mmsys_dev;  in mtk_drm_crtc_create()
910 	mtk_crtc->ddp_comp_nr = path_len;  in mtk_drm_crtc_create()
911 	mtk_crtc->ddp_comp = devm_kmalloc_array(dev, mtk_crtc->ddp_comp_nr,  in mtk_drm_crtc_create()
912 						sizeof(*mtk_crtc->ddp_comp),  in mtk_drm_crtc_create()
914 	if (!mtk_crtc->ddp_comp)  in mtk_drm_crtc_create()
915 		return -ENOMEM;  in mtk_drm_crtc_create()
917 	mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);  in mtk_drm_crtc_create()
918 	if (IS_ERR(mtk_crtc->mutex)) {  in mtk_drm_crtc_create()
919 		ret = PTR_ERR(mtk_crtc->mutex);  in mtk_drm_crtc_create()
924 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
928 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
929 		mtk_crtc->ddp_comp[i] = comp;  in mtk_drm_crtc_create()
931 		if (comp->funcs) {  in mtk_drm_crtc_create()
932 			if (comp->funcs->gamma_set)  in mtk_drm_crtc_create()
935 			if (comp->funcs->ctm_set)  in mtk_drm_crtc_create()
940 						&mtk_crtc->base);  in mtk_drm_crtc_create()
943 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_drm_crtc_create()
946 	mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,  in mtk_drm_crtc_create()
949 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
961 		drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);  in mtk_drm_crtc_create()
962 	drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size);  in mtk_drm_crtc_create()
963 	priv->num_pipes++;  in mtk_drm_crtc_create()
964 	mutex_init(&mtk_crtc->hw_lock);  in mtk_drm_crtc_create()
967 	mtk_crtc->cmdq_client.client.dev = mtk_crtc->mmsys_dev;  in mtk_drm_crtc_create()
968 	mtk_crtc->cmdq_client.client.tx_block = false;  in mtk_drm_crtc_create()
969 	mtk_crtc->cmdq_client.client.knows_txdone = true;  in mtk_drm_crtc_create()
970 	mtk_crtc->cmdq_client.client.rx_callback = ddp_cmdq_cb;  in mtk_drm_crtc_create()
971 	mtk_crtc->cmdq_client.chan =  in mtk_drm_crtc_create()
972 			mbox_request_channel(&mtk_crtc->cmdq_client.client,  in mtk_drm_crtc_create()
973 					     drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
974 	if (IS_ERR(mtk_crtc->cmdq_client.chan)) {  in mtk_drm_crtc_create()
976 			drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
977 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
980 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_create()
981 		ret = of_property_read_u32_index(priv->mutex_node,  in mtk_drm_crtc_create()
982 						 "mediatek,gce-events",  in mtk_drm_crtc_create()
983 						 drm_crtc_index(&mtk_crtc->base),  in mtk_drm_crtc_create()
984 						 &mtk_crtc->cmdq_event);  in mtk_drm_crtc_create()
986 			dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n",  in mtk_drm_crtc_create()
987 				drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
988 			mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_create()
989 			mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
991 			ret = mtk_drm_cmdq_pkt_create(&mtk_crtc->cmdq_client,  in mtk_drm_crtc_create()
992 						      &mtk_crtc->cmdq_handle,  in mtk_drm_crtc_create()
996 					drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
997 				mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_create()
998 				mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
1003 		init_waitqueue_head(&mtk_crtc->cb_blocking_queue);  in mtk_drm_crtc_create()