436 		dev_priv->display.wm.vlv.cxsr = enable;  in intel_set_memory_cxsr()
438 		dev_priv->display.wm.g4x.cxsr = enable;  in intel_set_memory_cxsr()
1309 		wm_state->cxsr = false;  in g4x_invalidate_wms()
1386 	wm_state->cxsr = active_planes == BIT(PLANE_PRIMARY);  in g4x_compute_pipe_wm()
1397 	wm_state->hpll_en = wm_state->cxsr;  in g4x_compute_pipe_wm()
1437 		intermediate->cxsr = false;  in g4x_compute_intermediate_wm()
1442 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in g4x_compute_intermediate_wm()
1476 		    intermediate->cxsr);  in g4x_compute_intermediate_wm()
1486 		    intermediate->fbc_en && intermediate->cxsr);  in g4x_compute_intermediate_wm()
1508 	wm->cxsr = true;  in g4x_merge_wm()
1518 		if (!wm_state->cxsr)  in g4x_merge_wm()
1519 			wm->cxsr = false;  in g4x_merge_wm()
1529 		wm->cxsr = false;  in g4x_merge_wm()
1539 		if (crtc->active && wm->cxsr)  in g4x_merge_wm()
1556 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1561 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1926 	wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;  in vlv_compute_pipe_wm()
2081 		intermediate->cxsr = false;  in vlv_compute_intermediate_wm()
2086 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in vlv_compute_intermediate_wm()
2124 	wm->cxsr = true;  in vlv_merge_wm()
2132 		if (!wm_state->cxsr)  in vlv_merge_wm()
2133 			wm->cxsr = false;  in vlv_merge_wm()
2140 		wm->cxsr = false;  in vlv_merge_wm()
2150 		if (crtc->active && wm->cxsr)  in vlv_merge_wm()
2176 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
2181 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
3765 	wm->cxsr = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;  in g4x_wm_get_hw_state()
3776 		active->cxsr = wm->cxsr;  in g4x_wm_get_hw_state()
3788 		if (wm->cxsr && wm->hpll_en)  in g4x_wm_get_hw_state()
3790 		else if (wm->cxsr)  in g4x_wm_get_hw_state()
3845 		    str_yes_no(wm->cxsr), str_yes_no(wm->hpll_en),  in g4x_wm_get_hw_state()
3913 	wm->cxsr = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;  in vlv_wm_get_hw_state()
3964 		active->cxsr = wm->cxsr;  in vlv_wm_get_hw_state()
4002 		    wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);  in vlv_wm_get_hw_state()