Lines Matching refs:gt
456 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
461 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
470 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
718 struct intel_gt_coredump *gt) in err_print_gt_info() argument
722 intel_gt_info_print(>->info, &p); in err_print_gt_info()
723 intel_sseu_print_topology(gt->_gt->i915, >->info.sseu, &p); in err_print_gt_info()
727 struct intel_gt_coredump *gt) in err_print_gt_display() argument
729 err_printf(m, "IER: 0x%08x\n", gt->ier); in err_print_gt_display()
730 err_printf(m, "DERRMR: 0x%08x\n", gt->derrmr); in err_print_gt_display()
734 struct intel_gt_coredump *gt) in err_print_gt_global_nonguc() argument
738 err_printf(m, "GT awake: %s\n", str_yes_no(gt->awake)); in err_print_gt_global_nonguc()
740 gt->clock_frequency, gt->clock_period_ns); in err_print_gt_global_nonguc()
741 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt_global_nonguc()
742 err_printf(m, "PGTBL_ER: 0x%08x\n", gt->pgtbl_er); in err_print_gt_global_nonguc()
744 for (i = 0; i < gt->ngtier; i++) in err_print_gt_global_nonguc()
745 err_printf(m, "GTIER[%d]: 0x%08x\n", i, gt->gtier[i]); in err_print_gt_global_nonguc()
749 struct intel_gt_coredump *gt) in err_print_gt_global() argument
751 err_printf(m, "FORCEWAKE: 0x%08x\n", gt->forcewake); in err_print_gt_global()
754 err_printf(m, "ERROR: 0x%08x\n", gt->error); in err_print_gt_global()
755 err_printf(m, "DONE_REG: 0x%08x\n", gt->done_reg); in err_print_gt_global()
760 gt->fault_data1, gt->fault_data0); in err_print_gt_global()
763 err_printf(m, "ERR_INT: 0x%08x\n", gt->err_int); in err_print_gt_global()
766 err_printf(m, "GTT_CACHE_EN: 0x%08x\n", gt->gtt_cache); in err_print_gt_global()
769 err_printf(m, "AUX_ERR_DBG: 0x%08x\n", gt->aux_err); in err_print_gt_global()
780 if ((gt->_gt->info.sfc_mask & BIT(i)) == 0 || in err_print_gt_global()
781 !HAS_ENGINE(gt->_gt, _VCS(i * 2))) in err_print_gt_global()
785 gt->sfc_done[i]); in err_print_gt_global()
788 err_printf(m, " GAM_DONE: 0x%08x\n", gt->gam_done); in err_print_gt_global()
793 struct intel_gt_coredump *gt) in err_print_gt_fences() argument
797 for (i = 0; i < gt->nfence; i++) in err_print_gt_fences()
798 err_printf(m, " fence[%d] = %08llx\n", i, gt->fence[i]); in err_print_gt_fences()
802 struct intel_gt_coredump *gt) in err_print_gt_engines() argument
806 for (ee = gt->engine; ee; ee = ee->next) { in err_print_gt_engines()
848 for (ee = error->gt ? error->gt->engine : NULL; ee; ee = ee->next) in __err_print_to_sgl()
869 if (error->gt) { in __err_print_to_sgl()
872 if (error->gt->uc && error->gt->uc->guc.is_guc_capture) in __err_print_to_sgl()
875 err_print_gt_display(m, error->gt); in __err_print_to_sgl()
876 err_print_gt_global_nonguc(m, error->gt); in __err_print_to_sgl()
877 err_print_gt_fences(m, error->gt); in __err_print_to_sgl()
884 err_print_gt_global(m, error->gt); in __err_print_to_sgl()
886 err_print_gt_engines(m, error->gt); in __err_print_to_sgl()
888 if (error->gt->uc) in __err_print_to_sgl()
889 err_print_uc(m, error->gt->uc); in __err_print_to_sgl()
891 err_print_gt_info(m, error->gt); in __err_print_to_sgl()
1035 static void cleanup_gt(struct intel_gt_coredump *gt) in cleanup_gt() argument
1037 while (gt->engine) { in cleanup_gt()
1038 struct intel_engine_coredump *ee = gt->engine; in cleanup_gt()
1040 gt->engine = ee->next; in cleanup_gt()
1047 if (gt->uc) in cleanup_gt()
1048 cleanup_uc(gt->uc); in cleanup_gt()
1050 kfree(gt); in cleanup_gt()
1058 while (error->gt) { in __i915_gpu_coredump_free()
1059 struct intel_gt_coredump *gt = error->gt; in __i915_gpu_coredump_free() local
1061 error->gt = gt->next; in __i915_gpu_coredump_free()
1062 cleanup_gt(gt); in __i915_gpu_coredump_free()
1074 i915_vma_coredump_create(const struct intel_gt *gt, in i915_vma_coredump_create() argument
1080 struct i915_ggtt *ggtt = gt->ggtt; in i915_vma_coredump_create()
1192 static void gt_record_fences(struct intel_gt_coredump *gt) in gt_record_fences() argument
1194 struct i915_ggtt *ggtt = gt->_gt->ggtt; in gt_record_fences()
1195 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_fences()
1200 gt->fence[i] = in gt_record_fences()
1205 gt->fence[i] = in gt_record_fences()
1210 gt->fence[i] = in gt_record_fences()
1213 gt->nfence = i; in gt_record_fences()
1483 create_vma_coredump(const struct intel_gt *gt, struct i915_vma *vma, in create_vma_coredump() argument
1496 ret = i915_vma_coredump_create(gt, vma_res, compress, name); in create_vma_coredump()
1504 const struct intel_gt *gt, in add_vma_coredump() argument
1509 add_vma(ee, create_vma_coredump(gt, vma, name, compress)); in add_vma_coredump()
1571 i915_vma_coredump_create(engine->gt, vma_res, in intel_engine_coredump_add_vma()
1581 add_vma_coredump(ee, engine->gt, engine->status_page.vma, in intel_engine_coredump_add_vma()
1584 add_vma_coredump(ee, engine->gt, engine->wa_ctx.vma, in intel_engine_coredump_add_vma()
1614 if (!intel_uc_uses_guc_submission(&engine->gt->uc)) { in capture_engine()
1633 intel_guc_capture_get_matching_node(engine->gt, ee, ce); in capture_engine()
1646 gt_record_engines(struct intel_gt_coredump *gt, in gt_record_engines() argument
1654 for_each_engine(engine, gt->_gt, id) { in gt_record_engines()
1666 gt->simulated |= ee->simulated; in gt_record_engines()
1674 ee->next = gt->engine; in gt_record_engines()
1675 gt->engine = ee; in gt_record_engines()
1697 gt_record_uc(struct intel_gt_coredump *gt, in gt_record_uc() argument
1700 const struct intel_uc *uc = >->_gt->uc; in gt_record_uc()
1720 error_uc->guc.timestamp = intel_uncore_read(gt->_gt->uncore, GUCPMTIMESTAMP); in gt_record_uc()
1721 error_uc->guc.vma_log = create_vma_coredump(gt->_gt, uc->guc.log.vma, in gt_record_uc()
1723 error_uc->guc.vma_ctb = create_vma_coredump(gt->_gt, uc->guc.ct.vma, in gt_record_uc()
1735 static void gt_record_display_regs(struct intel_gt_coredump *gt) in gt_record_display_regs() argument
1737 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_display_regs()
1741 gt->derrmr = intel_uncore_read(uncore, DERRMR); in gt_record_display_regs()
1744 gt->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER); in gt_record_display_regs()
1746 gt->ier = intel_uncore_read(uncore, VLV_IER); in gt_record_display_regs()
1748 gt->ier = intel_uncore_read(uncore, DEIER); in gt_record_display_regs()
1750 gt->ier = intel_uncore_read16(uncore, GEN2_IER); in gt_record_display_regs()
1752 gt->ier = intel_uncore_read(uncore, GEN2_IER); in gt_record_display_regs()
1756 static void gt_record_global_nonguc_regs(struct intel_gt_coredump *gt) in gt_record_global_nonguc_regs() argument
1758 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_global_nonguc_regs()
1763 gt->gtier[0] = intel_uncore_read(uncore, GTIER); in gt_record_global_nonguc_regs()
1764 gt->ngtier = 1; in gt_record_global_nonguc_regs()
1766 gt->gtier[0] = in gt_record_global_nonguc_regs()
1769 gt->gtier[1] = in gt_record_global_nonguc_regs()
1771 gt->gtier[2] = in gt_record_global_nonguc_regs()
1773 gt->gtier[3] = in gt_record_global_nonguc_regs()
1776 gt->gtier[4] = in gt_record_global_nonguc_regs()
1779 gt->gtier[5] = in gt_record_global_nonguc_regs()
1782 gt->ngtier = 6; in gt_record_global_nonguc_regs()
1785 gt->gtier[i] = in gt_record_global_nonguc_regs()
1787 gt->ngtier = 4; in gt_record_global_nonguc_regs()
1789 gt->gtier[0] = intel_uncore_read(uncore, GTIER); in gt_record_global_nonguc_regs()
1790 gt->ngtier = 1; in gt_record_global_nonguc_regs()
1793 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_global_nonguc_regs()
1794 gt->pgtbl_er = intel_uncore_read(uncore, PGTBL_ER); in gt_record_global_nonguc_regs()
1801 static void gt_record_global_regs(struct intel_gt_coredump *gt) in gt_record_global_regs() argument
1803 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_global_regs()
1818 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); in gt_record_global_regs()
1821 gt->err_int = intel_uncore_read(uncore, GEN7_ERR_INT); in gt_record_global_regs()
1824 gt->fault_data0 = intel_uncore_read(uncore, in gt_record_global_regs()
1826 gt->fault_data1 = intel_uncore_read(uncore, in gt_record_global_regs()
1829 gt->fault_data0 = intel_uncore_read(uncore, in gt_record_global_regs()
1831 gt->fault_data1 = intel_uncore_read(uncore, in gt_record_global_regs()
1836 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE); in gt_record_global_regs()
1837 gt->gab_ctl = intel_uncore_read(uncore, GAB_CTL); in gt_record_global_regs()
1838 gt->gfx_mode = intel_uncore_read(uncore, GFX_MODE); in gt_record_global_regs()
1843 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gt_record_global_regs()
1847 gt->error = intel_uncore_read(uncore, ERROR_GEN6); in gt_record_global_regs()
1848 gt->done_reg = intel_uncore_read(uncore, DONE_REG); in gt_record_global_regs()
1854 gt->gam_ecochk = intel_uncore_read(uncore, GAM_ECOCHK); in gt_record_global_regs()
1855 gt->gac_eco = intel_uncore_read(uncore, GAC_ECO_BITS); in gt_record_global_regs()
1859 gt->gtt_cache = intel_uncore_read(uncore, HSW_GTT_CACHE_EN); in gt_record_global_regs()
1862 gt->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG); in gt_record_global_regs()
1871 if ((gt->_gt->info.sfc_mask & BIT(i)) == 0 || in gt_record_global_regs()
1872 !HAS_ENGINE(gt->_gt, _VCS(i * 2))) in gt_record_global_regs()
1875 gt->sfc_done[i] = in gt_record_global_regs()
1879 gt->gam_done = intel_uncore_read(uncore, GEN12_GAM_DONE); in gt_record_global_regs()
1883 static void gt_record_info(struct intel_gt_coredump *gt) in gt_record_info() argument
1885 memcpy(>->info, >->_gt->info, sizeof(struct intel_gt_info)); in gt_record_info()
1886 gt->clock_frequency = gt->_gt->clock_frequency; in gt_record_info()
1887 gt->clock_period_ns = gt->_gt->clock_period_ns; in gt_record_info()
1915 struct intel_gt_coredump *gt; in error_msg() local
1918 for (gt = error->gt; gt; gt = gt->next) { in error_msg()
1921 for (cs = gt->engine; cs; cs = cs->next) { in error_msg()
1994 intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags) in intel_gt_coredump_alloc() argument
2002 gc->_gt = gt; in intel_gt_coredump_alloc()
2003 gc->awake = intel_gt_pm_is_awake(gt); in intel_gt_coredump_alloc()
2026 i915_vma_capture_prepare(struct intel_gt_coredump *gt) in i915_vma_capture_prepare() argument
2042 void i915_vma_capture_finish(struct intel_gt_coredump *gt, in i915_vma_capture_finish() argument
2053 __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in __i915_gpu_coredump() argument
2055 struct drm_i915_private *i915 = gt->i915; in __i915_gpu_coredump()
2067 error->gt = intel_gt_coredump_alloc(gt, ALLOW_FAIL, dump_flags); in __i915_gpu_coredump()
2068 if (error->gt) { in __i915_gpu_coredump()
2071 compress = i915_vma_capture_prepare(error->gt); in __i915_gpu_coredump()
2073 kfree(error->gt); in __i915_gpu_coredump()
2079 error->gt->uc = gt_record_uc(error->gt, compress); in __i915_gpu_coredump()
2080 if (error->gt->uc) { in __i915_gpu_coredump()
2082 error->gt->uc->guc.is_guc_capture = true; in __i915_gpu_coredump()
2084 GEM_BUG_ON(error->gt->uc->guc.is_guc_capture); in __i915_gpu_coredump()
2088 gt_record_info(error->gt); in __i915_gpu_coredump()
2089 gt_record_engines(error->gt, engine_mask, compress, dump_flags); in __i915_gpu_coredump()
2092 i915_vma_capture_finish(error->gt, compress); in __i915_gpu_coredump()
2094 error->simulated |= error->gt->simulated; in __i915_gpu_coredump()
2103 i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_gpu_coredump() argument
2112 dump = __i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_gpu_coredump()
2158 void i915_capture_error_state(struct intel_gt *gt, in i915_capture_error_state() argument
2163 error = i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_capture_error_state()
2165 cmpxchg(>->i915->gpu_error.first_error, NULL, error); in i915_capture_error_state()