438 				 const struct intel_engine_coredump *ee)  in error_print_instdone()  argument
445 		   ee->instdone.instdone);  in error_print_instdone()
447 	if (ee->engine->class != RENDER_CLASS || GRAPHICS_VER(m->i915) <= 3)  in error_print_instdone()
451 		   ee->instdone.slice_common);  in error_print_instdone()
456 	for_each_ss_steering(iter, ee->engine->gt, slice, subslice)  in error_print_instdone()
459 			   ee->instdone.sampler[slice][subslice]);  in error_print_instdone()
461 	for_each_ss_steering(iter, ee->engine->gt, slice, subslice)  in error_print_instdone()
464 			   ee->instdone.row[slice][subslice]);  in error_print_instdone()
470 		for_each_ss_steering(iter, ee->engine->gt, slice, subslice)  in error_print_instdone()
473 				   ee->instdone.geom_svg[slice][subslice]);  in error_print_instdone()
477 		   ee->instdone.slice_common_extra[0]);  in error_print_instdone()
479 		   ee->instdone.slice_common_extra[1]);  in error_print_instdone()
522 intel_gpu_error_find_batch(const struct intel_engine_coredump *ee)  in intel_gpu_error_find_batch()  argument
524 	return __find_vma(ee->vma, "batch");  in intel_gpu_error_find_batch()
528 			       const struct intel_engine_coredump *ee)  in error_print_engine()  argument
533 	err_printf(m, "%s command stream:\n", ee->engine->name);  in error_print_engine()
534 	err_printf(m, "  CCID:  0x%08x\n", ee->ccid);  in error_print_engine()
535 	err_printf(m, "  START: 0x%08x\n", ee->start);  in error_print_engine()
536 	err_printf(m, "  HEAD:  0x%08x [0x%08x]\n", ee->head, ee->rq_head);  in error_print_engine()
538 		   ee->tail, ee->rq_post, ee->rq_tail);  in error_print_engine()
539 	err_printf(m, "  CTL:   0x%08x\n", ee->ctl);  in error_print_engine()
540 	err_printf(m, "  MODE:  0x%08x\n", ee->mode);  in error_print_engine()
541 	err_printf(m, "  HWS:   0x%08x\n", ee->hws);  in error_print_engine()
543 		   (u32)(ee->acthd>>32), (u32)ee->acthd);  in error_print_engine()
544 	err_printf(m, "  IPEIR: 0x%08x\n", ee->ipeir);  in error_print_engine()
545 	err_printf(m, "  IPEHR: 0x%08x\n", ee->ipehr);  in error_print_engine()
546 	err_printf(m, "  ESR:   0x%08x\n", ee->esr);  in error_print_engine()
548 	error_print_instdone(m, ee);  in error_print_engine()
550 	batch = intel_gpu_error_find_batch(ee);  in error_print_engine()
561 			   (u32)(ee->bbaddr>>32), (u32)ee->bbaddr);  in error_print_engine()
562 		err_printf(m, "  BB_STATE: 0x%08x\n", ee->bbstate);  in error_print_engine()
563 		err_printf(m, "  INSTPS: 0x%08x\n", ee->instps);  in error_print_engine()
565 	err_printf(m, "  INSTPM: 0x%08x\n", ee->instpm);  in error_print_engine()
566 	err_printf(m, "  FADDR: 0x%08x %08x\n", upper_32_bits(ee->faddr),  in error_print_engine()
567 		   lower_32_bits(ee->faddr));  in error_print_engine()
569 		err_printf(m, "  RC PSMI: 0x%08x\n", ee->rc_psmi);  in error_print_engine()
570 		err_printf(m, "  FAULT_REG: 0x%08x\n", ee->fault_reg);  in error_print_engine()
573 		err_printf(m, "  NOPID: 0x%08x\n", ee->nopid);  in error_print_engine()
574 		err_printf(m, "  EXCC: 0x%08x\n", ee->excc);  in error_print_engine()
575 		err_printf(m, "  CMD_CCTL: 0x%08x\n", ee->cmd_cctl);  in error_print_engine()
576 		err_printf(m, "  CSCMDOP: 0x%08x\n", ee->cscmdop);  in error_print_engine()
577 		err_printf(m, "  CTX_SR_CTL: 0x%08x\n", ee->ctx_sr_ctl);  in error_print_engine()
578 		err_printf(m, "  DMA_FADDR_HI: 0x%08x\n", ee->dma_faddr_hi);  in error_print_engine()
579 		err_printf(m, "  DMA_FADDR_LO: 0x%08x\n", ee->dma_faddr_lo);  in error_print_engine()
582 		err_printf(m, "  GFX_MODE: 0x%08x\n", ee->vm_info.gfx_mode);  in error_print_engine()
588 					   i, ee->vm_info.pdp[i]);  in error_print_engine()
591 				   ee->vm_info.pp_dir_base);  in error_print_engine()
595 	for (n = 0; n < ee->num_ports; n++) {  in error_print_engine()
597 		error_print_request(m, " ", &ee->execlist[n]);  in error_print_engine()
804 	const struct intel_engine_coredump *ee;  in err_print_gt_engines()  local
806 	for (ee = gt->engine; ee; ee = ee->next) {  in err_print_gt_engines()
809 		if (ee->guc_capture_node)  in err_print_gt_engines()
810 			intel_guc_capture_print_engine_node(m, ee);  in err_print_gt_engines()
812 			error_print_engine(m, ee);  in err_print_gt_engines()
814 		err_printf(m, "  hung: %u\n", ee->hung);  in err_print_gt_engines()
815 		err_printf(m, "  engine reset count: %u\n", ee->reset_count);  in err_print_gt_engines()
816 		error_print_context(m, "  Active context: ", &ee->context);  in err_print_gt_engines()
818 		for (vma = ee->vma; vma; vma = vma->next)  in err_print_gt_engines()
819 			intel_gpu_error_print_vma(m, ee->engine, vma);  in err_print_gt_engines()
827 	const struct intel_engine_coredump *ee;  in __err_print_to_sgl()  local
848 	for (ee = error->gt ? error->gt->engine : NULL; ee; ee = ee->next)  in __err_print_to_sgl()
850 			   ee->engine->name,  in __err_print_to_sgl()
851 			   ee->context.comm,  in __err_print_to_sgl()
852 			   ee->context.pid);  in __err_print_to_sgl()
1038 		struct intel_engine_coredump *ee = gt->engine;  in cleanup_gt()  local
1040 		gt->engine = ee->next;  in cleanup_gt()
1042 		i915_vma_coredump_free(ee->vma);  in cleanup_gt()
1043 		intel_guc_capture_free_node(ee);  in cleanup_gt()
1044 		kfree(ee);  in cleanup_gt()
1216 static void engine_record_registers(struct intel_engine_coredump *ee)  in engine_record_registers()  argument
1218 	const struct intel_engine_cs *engine = ee->engine;  in engine_record_registers()
1222 		ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL);  in engine_record_registers()
1225 			ee->fault_reg = intel_uncore_read(engine->uncore,  in engine_record_registers()
1228 			ee->fault_reg = intel_uncore_read(engine->uncore,  in engine_record_registers()
1231 			ee->fault_reg = GEN6_RING_FAULT_REG_READ(engine);  in engine_record_registers()
1235 		ee->esr = ENGINE_READ(engine, RING_ESR);  in engine_record_registers()
1236 		ee->faddr = ENGINE_READ(engine, RING_DMA_FADD);  in engine_record_registers()
1237 		ee->ipeir = ENGINE_READ(engine, RING_IPEIR);  in engine_record_registers()
1238 		ee->ipehr = ENGINE_READ(engine, RING_IPEHR);  in engine_record_registers()
1239 		ee->instps = ENGINE_READ(engine, RING_INSTPS);  in engine_record_registers()
1240 		ee->bbaddr = ENGINE_READ(engine, RING_BBADDR);  in engine_record_registers()
1241 		ee->ccid = ENGINE_READ(engine, CCID);  in engine_record_registers()
1243 			ee->faddr |= (u64)ENGINE_READ(engine, RING_DMA_FADD_UDW) << 32;  in engine_record_registers()
1244 			ee->bbaddr |= (u64)ENGINE_READ(engine, RING_BBADDR_UDW) << 32;  in engine_record_registers()
1246 		ee->bbstate = ENGINE_READ(engine, RING_BBSTATE);  in engine_record_registers()
1248 		ee->faddr = ENGINE_READ(engine, DMA_FADD_I8XX);  in engine_record_registers()
1249 		ee->ipeir = ENGINE_READ(engine, IPEIR);  in engine_record_registers()
1250 		ee->ipehr = ENGINE_READ(engine, IPEHR);  in engine_record_registers()
1254 		ee->cmd_cctl = ENGINE_READ(engine, RING_CMD_CCTL);  in engine_record_registers()
1255 		ee->cscmdop = ENGINE_READ(engine, RING_CSCMDOP);  in engine_record_registers()
1256 		ee->ctx_sr_ctl = ENGINE_READ(engine, RING_CTX_SR_CTL);  in engine_record_registers()
1257 		ee->dma_faddr_hi = ENGINE_READ(engine, RING_DMA_FADD_UDW);  in engine_record_registers()
1258 		ee->dma_faddr_lo = ENGINE_READ(engine, RING_DMA_FADD);  in engine_record_registers()
1259 		ee->nopid = ENGINE_READ(engine, RING_NOPID);  in engine_record_registers()
1260 		ee->excc = ENGINE_READ(engine, RING_EXCC);  in engine_record_registers()
1263 	intel_engine_get_instdone(engine, &ee->instdone);  in engine_record_registers()
1265 	ee->instpm = ENGINE_READ(engine, RING_INSTPM);  in engine_record_registers()
1266 	ee->acthd = intel_engine_get_active_head(engine);  in engine_record_registers()
1267 	ee->start = ENGINE_READ(engine, RING_START);  in engine_record_registers()
1268 	ee->head = ENGINE_READ(engine, RING_HEAD);  in engine_record_registers()
1269 	ee->tail = ENGINE_READ(engine, RING_TAIL);  in engine_record_registers()
1270 	ee->ctl = ENGINE_READ(engine, RING_CTL);  in engine_record_registers()
1272 		ee->mode = ENGINE_READ(engine, RING_MI_MODE);  in engine_record_registers()
1302 		ee->hws = intel_uncore_read(engine->uncore, mmio);  in engine_record_registers()
1305 	ee->reset_count = i915_reset_engine_count(&i915->gpu_error, engine);  in engine_record_registers()
1310 		ee->vm_info.gfx_mode = ENGINE_READ(engine, RING_MODE_GEN7);  in engine_record_registers()
1313 			ee->vm_info.pp_dir_base =  in engine_record_registers()
1316 			ee->vm_info.pp_dir_base =  in engine_record_registers()
1322 				ee->vm_info.pdp[i] =  in engine_record_registers()
1325 				ee->vm_info.pdp[i] <<= 32;  in engine_record_registers()
1326 				ee->vm_info.pdp[i] |=  in engine_record_registers()
1356 static void engine_record_execlists(struct intel_engine_coredump *ee)  in engine_record_execlists()  argument
1358 	const struct intel_engine_execlists * const el = &ee->engine->execlists;  in engine_record_execlists()
1363 		record_request(*port++, &ee->execlist[n++]);  in engine_record_execlists()
1365 	ee->num_ports = n;  in engine_record_execlists()
1473 static void add_vma(struct intel_engine_coredump *ee,  in add_vma()  argument
1477 		vma->next = ee->vma;  in add_vma()
1478 		ee->vma = vma;  in add_vma()
1503 static void add_vma_coredump(struct intel_engine_coredump *ee,  in add_vma_coredump()  argument
1509 	add_vma(ee, create_vma_coredump(gt, vma, name, compress));  in add_vma_coredump()
1515 	struct intel_engine_coredump *ee;  in intel_engine_coredump_alloc()  local
1517 	ee = kzalloc(sizeof(*ee), gfp);  in intel_engine_coredump_alloc()
1518 	if (!ee)  in intel_engine_coredump_alloc()
1521 	ee->engine = engine;  in intel_engine_coredump_alloc()
1524 		engine_record_registers(ee);  in intel_engine_coredump_alloc()
1525 		engine_record_execlists(ee);  in intel_engine_coredump_alloc()
1528 	return ee;  in intel_engine_coredump_alloc()
1532 intel_engine_coredump_add_request(struct intel_engine_coredump *ee,  in intel_engine_coredump_add_request()  argument
1538 	ee->simulated |= record_context(&ee->context, rq);  in intel_engine_coredump_add_request()
1539 	if (ee->simulated)  in intel_engine_coredump_add_request()
1552 	ee->rq_head = rq->head;  in intel_engine_coredump_add_request()
1553 	ee->rq_post = rq->postfix;  in intel_engine_coredump_add_request()
1554 	ee->rq_tail = rq->tail;  in intel_engine_coredump_add_request()
1560 intel_engine_coredump_add_vma(struct intel_engine_coredump *ee,  in intel_engine_coredump_add_vma()  argument
1564 	const struct intel_engine_cs *engine = ee->engine;  in intel_engine_coredump_add_vma()
1570 		add_vma(ee,  in intel_engine_coredump_add_vma()
1581 	add_vma_coredump(ee, engine->gt, engine->status_page.vma,  in intel_engine_coredump_add_vma()
1584 	add_vma_coredump(ee, engine->gt, engine->wa_ctx.vma,  in intel_engine_coredump_add_vma()
1594 	struct intel_engine_coredump *ee;  in capture_engine()  local
1599 	ee = intel_engine_coredump_alloc(engine, ALLOW_FAIL, dump_flags);  in capture_engine()
1600 	if (!ee)  in capture_engine()
1627 	capture = intel_engine_coredump_add_request(ee, rq, ATOMIC_MAYFAIL);  in capture_engine()
1633 		intel_guc_capture_get_matching_node(engine->gt, ee, ce);  in capture_engine()
1635 	intel_engine_coredump_add_vma(ee, capture, compress);  in capture_engine()
1638 	return ee;  in capture_engine()
1641 	kfree(ee);  in capture_engine()
1655 		struct intel_engine_coredump *ee;  in gt_record_engines()  local
1660 		ee = capture_engine(engine, compress, dump_flags);  in gt_record_engines()
1661 		if (!ee)  in gt_record_engines()
1664 		ee->hung = engine->mask & engine_mask;  in gt_record_engines()
1666 		gt->simulated |= ee->simulated;  in gt_record_engines()
1667 		if (ee->simulated) {  in gt_record_engines()
1669 				intel_guc_capture_free_node(ee);  in gt_record_engines()
1670 			kfree(ee);  in gt_record_engines()
1674 		ee->next = gt->engine;  in gt_record_engines()
1675 		gt->engine = ee;  in gt_record_engines()
1900 static u32 generate_ecode(const struct intel_engine_coredump *ee)  in generate_ecode()  argument
1908 	return ee ? ee->ipehr ^ ee->instdone.instdone : 0;  in generate_ecode()