Lines Matching refs:REG32

581 #define REG32(_reg, ...) \  macro
622 	REG32(GEN7_3DPRIM_END_OFFSET),
623 	REG32(GEN7_3DPRIM_START_VERTEX),
624 	REG32(GEN7_3DPRIM_VERTEX_COUNT),
625 	REG32(GEN7_3DPRIM_INSTANCE_COUNT),
626 	REG32(GEN7_3DPRIM_START_INSTANCE),
627 	REG32(GEN7_3DPRIM_BASE_VERTEX),
628 	REG32(GEN7_GPGPU_DISPATCHDIMX),
629 	REG32(GEN7_GPGPU_DISPATCHDIMY),
630 	REG32(GEN7_GPGPU_DISPATCHDIMZ),
640 	REG32(GEN7_SO_WRITE_OFFSET(0)),
641 	REG32(GEN7_SO_WRITE_OFFSET(1)),
642 	REG32(GEN7_SO_WRITE_OFFSET(2)),
643 	REG32(GEN7_SO_WRITE_OFFSET(3)),
644 	REG32(GEN7_L3SQCREG1),
645 	REG32(GEN7_L3CNTLREG2),
646 	REG32(GEN7_L3CNTLREG3),
667 	REG32(HSW_SCRATCH1,
670 	REG32(HSW_ROW_CHICKEN3,
679 	REG32(BCS_SWCTRL),
686 	REG32(BCS_SWCTRL),
708 #undef REG32