205 	struct engine_mmio *mmio;  in restore_context_mmio_for_inhibit()  local
222 	for (mmio = gvt->engine_mmio_list.mmio;  in restore_context_mmio_for_inhibit()
223 	     i915_mmio_reg_valid(mmio->reg); mmio++) {  in restore_context_mmio_for_inhibit()
224 		if (mmio->id != ring_id || !mmio->in_context)  in restore_context_mmio_for_inhibit()
227 		*cs++ = i915_mmio_reg_offset(mmio->reg);  in restore_context_mmio_for_inhibit()
228 		*cs++ = vgpu_vreg_t(vgpu, mmio->reg) | (mmio->mask << 16);  in restore_context_mmio_for_inhibit()
478 	struct engine_mmio *mmio;  in switch_mmio()  local
484 	for (mmio = engine->i915->gvt->engine_mmio_list.mmio;  in switch_mmio()
485 	     i915_mmio_reg_valid(mmio->reg); mmio++) {  in switch_mmio()
486 		if (mmio->id != engine->id)  in switch_mmio()
493 		if (GRAPHICS_VER(engine->i915) == 9 && mmio->in_context)  in switch_mmio()
498 			vgpu_vreg_t(pre, mmio->reg) =  in switch_mmio()
499 				intel_uncore_read_fw(uncore, mmio->reg);  in switch_mmio()
500 			if (mmio->mask)  in switch_mmio()
501 				vgpu_vreg_t(pre, mmio->reg) &=  in switch_mmio()
502 					~(mmio->mask << 16);  in switch_mmio()
503 			old_v = vgpu_vreg_t(pre, mmio->reg);  in switch_mmio()
505 			old_v = mmio->value =  in switch_mmio()
506 				intel_uncore_read_fw(uncore, mmio->reg);  in switch_mmio()
517 			if (mmio->in_context &&  in switch_mmio()
521 			if (mmio->mask)  in switch_mmio()
522 				new_v = vgpu_vreg_t(next, mmio->reg) |  in switch_mmio()
523 					(mmio->mask << 16);  in switch_mmio()
525 				new_v = vgpu_vreg_t(next, mmio->reg);  in switch_mmio()
527 			if (mmio->in_context)  in switch_mmio()
529 			if (mmio->mask)  in switch_mmio()
530 				new_v = mmio->value | (mmio->mask << 16);  in switch_mmio()
532 				new_v = mmio->value;  in switch_mmio()
535 		intel_uncore_write_fw(uncore, mmio->reg, new_v);  in switch_mmio()
540 				  i915_mmio_reg_offset(mmio->reg),  in switch_mmio()
585 	struct engine_mmio *mmio;  in intel_gvt_init_engine_mmio_context()  local
588 		gvt->engine_mmio_list.mmio = gen9_engine_mmio_list;  in intel_gvt_init_engine_mmio_context()
594 		gvt->engine_mmio_list.mmio = gen8_engine_mmio_list;  in intel_gvt_init_engine_mmio_context()
599 	for (mmio = gvt->engine_mmio_list.mmio;  in intel_gvt_init_engine_mmio_context()
600 	     i915_mmio_reg_valid(mmio->reg); mmio++) {  in intel_gvt_init_engine_mmio_context()
601 		if (mmio->in_context) {  in intel_gvt_init_engine_mmio_context()
602 			gvt->engine_mmio_list.ctx_mmio_count[mmio->id]++;  in intel_gvt_init_engine_mmio_context()
603 			intel_gvt_mmio_set_sr_in_ctx(gvt, mmio->reg.reg);  in intel_gvt_init_engine_mmio_context()