95 	/* Cool contexts are too cool to be banned! (Used for reset testing.) */  in mark_guilty()
102 		   "%s context reset due to GPU hang\n",  in mark_guilty()
174 	/* Assert reset for at least 20 usec, and wait for acknowledgement. */  in i915_do_reset()
179 	/* Clear the reset request. */  in i915_do_reset()
222 		GT_TRACE(gt, "Wait for media reset failed\n");  in g4x_do_reset()
230 		GT_TRACE(gt, "Wait for render reset failed\n");  in g4x_do_reset()
256 		GT_TRACE(gt, "Wait for render reset failed\n");  in ilk_do_reset()
267 		GT_TRACE(gt, "Wait for media reset failed\n");  in ilk_do_reset()
277 /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */
290 	/* Wait for the device to ack the reset requests */  in gen6_hw_domain_reset()
297 			 "Wait for 0x%08x engines reset failed\n",  in gen6_hw_domain_reset()
445 	 * If the engine is using an SFC, tell the engine that a software reset  in gen11_lock_sfc()
447 	 * If SFC ends up being locked to the engine we want to reset, we have  in gen11_lock_sfc()
448 	 * to reset it as well (we will unlock it once the reset sequence is  in gen11_lock_sfc()
462 	 * We should reset both the engine and the SFC if:  in gen11_lock_sfc()
468 	 * Otherwise we need only reset the engine by itself and we can  in gen11_lock_sfc()
535 	 * wasn't being reset.  So instead of calling gen11_unlock_sfc()  in __gen11_reset_engines()
558 		 * For catastrophic errors, ready-for-reset sequence  in gen8_engine_reset_prepare()
579 			"%s reset request timed out: {request: %08x, RESET_CTL: %08x}\n",  in gen8_engine_reset_prepare()
615 		 * some gens (kbl), possible system hang if reset  in gen8_reset_engines()
619 		 * failed reset with a wedged driver/gpu. And  in gen8_reset_engines()
621 		 * stop_engines() we have before the reset.  in gen8_reset_engines()
626 	 * Wa_22011100796:dg2, whenever Full soft reset is required,  in gen8_reset_engines()
627 	 * reset all individual engines firstly, and then do a full soft reset.  in gen8_reset_engines()
629 	 * This is best effort, so ignore any error from the initial reset.  in gen8_reset_engines()
684 	reset_func reset;  in __intel_gt_reset()  local
688 	reset = intel_get_gpu_reset(gt);  in __intel_gt_reset()
689 	if (!reset)  in __intel_gt_reset()
693 	 * If the power well sleeps during the reset, the reset  in __intel_gt_reset()
700 		ret = reset(gt, engine_mask, retry);  in __intel_gt_reset()
710 	if (!gt->i915->params.reset)  in intel_has_gpu_reset()
718 	if (gt->i915->params.reset < 2)  in intel_has_reset_engine()
746 	 * During the reset sequence, we must prevent the engine from  in reset_prepare_engine()
748 	 * the engine, if it does enter RC6 during the reset, the state  in reset_prepare_engine()
750 	 * GPU state upon resume, i.e. fail to restart after a reset.  in reset_prepare_engine()
753 	if (engine->reset.prepare)  in reset_prepare_engine()
754 		engine->reset.prepare(engine);  in reset_prepare_engine()
839 	if (engine->reset.finish)  in reset_finish_engine()
840 		engine->reset.finish(engine);  in reset_finish_engine()
879 	if (test_bit(I915_WEDGED, &gt->reset.flags))  in __intel_gt_set_wedged()
891 	/* Even if the GPU reset fails, it should still stop the engines */  in __intel_gt_set_wedged()
904 	set_bit(I915_WEDGED, &gt->reset.flags);  in __intel_gt_set_wedged()
909 		if (engine->reset.cancel)  in __intel_gt_set_wedged()
910 			engine->reset.cancel(engine);  in __intel_gt_set_wedged()
923 	if (test_bit(I915_WEDGED, &gt->reset.flags))  in intel_gt_set_wedged()
927 	mutex_lock(&gt->reset.mutex);  in intel_gt_set_wedged()
945 	mutex_unlock(&gt->reset.mutex);  in intel_gt_set_wedged()
955 	if (!test_bit(I915_WEDGED, &gt->reset.flags))  in __intel_gt_unset_wedged()
972 	 * No more can be submitted until we reset the wedged bit.  in __intel_gt_unset_wedged()
1000 	/* We must reset pending GPU events before restoring our submission */  in __intel_gt_unset_wedged()
1019 	 * the nop_submit_request on reset, we can do this from normal  in __intel_gt_unset_wedged()
1027 	clear_bit(I915_WEDGED, &gt->reset.flags);  in __intel_gt_unset_wedged()
1036 	mutex_lock(&gt->reset.mutex);  in intel_gt_unset_wedged()
1038 	mutex_unlock(&gt->reset.mutex);  in intel_gt_unset_wedged()
1074  * intel_gt_reset - reset chip after a hang
1075  * @gt: #intel_gt to reset
1079  * Reset the chip.  Useful if a hang is detected. Marks the device as wedged
1083  *   - reset the chip using the reset reg
1097 	GT_TRACE(gt, "flags=%lx\n", gt->reset.flags);  in intel_gt_reset()
1100 	GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &gt->reset.flags));  in intel_gt_reset()
1104 	 * critical section like gpu reset.  in intel_gt_reset()
1108 	mutex_lock(&gt->reset.mutex);  in intel_gt_reset()
1122 		if (gt->i915->params.reset)  in intel_gt_reset()
1123 			drm_err(&gt->i915->drm, "GPU reset not supported\n");  in intel_gt_reset()
1125 			drm_dbg(&gt->i915->drm, "GPU reset disabled\n");  in intel_gt_reset()
1133 		drm_err(&gt->i915->drm, "Failed to reset chip\n");  in intel_gt_reset()
1147 	 * was running at the time of the reset (i.e. we weren't VT  in intel_gt_reset()
1153 			"Failed to initialise HW following reset (%d)\n",  in intel_gt_reset()
1165 	mutex_unlock(&gt->reset.mutex);  in intel_gt_reset()
1170 	 * History tells us that if we cannot reset the GPU now, we  in intel_gt_reset()
1172 	 * subsequently. On failing the reset, we mark the driver  in intel_gt_reset()
1197 	ENGINE_TRACE(engine, "flags=%lx\n", gt->reset.flags);  in __intel_engine_reset_bh()
1198 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));  in __intel_engine_reset_bh()
1215 		/* If we fail here, we expect to fallback to a global reset */  in __intel_engine_reset_bh()
1216 		ENGINE_TRACE(engine, "Failed to reset %s, err: %d\n", engine->name, ret);  in __intel_engine_reset_bh()
1229 	 * have been reset to their default values. Follow the init_ring  in __intel_engine_reset_bh()
1242  * intel_engine_reset - reset GPU engine to recover from a hang
1243  * @engine: engine to reset
1244  * @msg: reason for GPU reset; or NULL for no drm_notice()
1246  * Reset a specific GPU engine. Useful if a hang is detected.
1247  * Returns zero on successful reset or otherwise an error code.
1251  *  - reset engine (which will force the engine to idle)
1280 	/* Use a watchdog to ensure that our reset completes */  in intel_gt_reset_global()
1289 	if (!test_bit(I915_WEDGED, &gt->reset.flags))  in intel_gt_reset_global()
1330 	 * request that won't finish until the reset is done. This  in intel_gt_handle_error()
1332 	 * simulated reset via debugfs, so get an RPM reference.  in intel_gt_handle_error()
1344 	 * Try engine reset when available. We fall back to full reset if  in intel_gt_handle_error()
1345 	 * single reset fails.  in intel_gt_handle_error()
1353 					     &gt->reset.flags))  in intel_gt_handle_error()
1360 					      &gt->reset.flags);  in intel_gt_handle_error()
1368 	/* Full reset needs the mutex, stop any other user trying to do so. */  in intel_gt_handle_error()
1369 	if (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {  in intel_gt_handle_error()
1370 		wait_event(gt->reset.queue,  in intel_gt_handle_error()
1371 			   !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));  in intel_gt_handle_error()
1372 		goto out; /* piggy-back on the other reset */  in intel_gt_handle_error()
1379 	 * Prevent any other reset-engine attempt. We don't do this for GuC  in intel_gt_handle_error()
1380 	 * submission the GuC owns the per-engine reset, not the i915.  in intel_gt_handle_error()
1385 						&gt->reset.flags))  in intel_gt_handle_error()
1386 				wait_on_bit(&gt->reset.flags,  in intel_gt_handle_error()
1393 	synchronize_srcu_expedited(&gt->reset.backoff_srcu);  in intel_gt_handle_error()
1400 					 &gt->reset.flags);  in intel_gt_handle_error()
1402 	clear_bit_unlock(I915_RESET_BACKOFF, &gt->reset.flags);  in intel_gt_handle_error()
1404 	wake_up_all(&gt->reset.queue);  in intel_gt_handle_error()
1412 	might_lock(&gt->reset.backoff_srcu);  in intel_gt_reset_trylock()
1416 	while (test_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {  in intel_gt_reset_trylock()
1419 		if (wait_event_interruptible(gt->reset.queue,  in intel_gt_reset_trylock()
1421 						       &gt->reset.flags)))  in intel_gt_reset_trylock()
1426 	*srcu = srcu_read_lock(&gt->reset.backoff_srcu);  in intel_gt_reset_trylock()
1433 __releases(&gt->reset.backoff_srcu)  in intel_gt_reset_unlock()
1435 	srcu_read_unlock(&gt->reset.backoff_srcu, tag);  in intel_gt_reset_unlock()
1448 	/* Reset still in progress? Maybe we will recover? */  in intel_gt_terminally_wedged()
1449 	if (wait_event_interruptible(gt->reset.queue,  in intel_gt_terminally_wedged()
1451 					       &gt->reset.flags)))  in intel_gt_terminally_wedged()
1463 	set_bit(I915_WEDGED_ON_INIT, &gt->reset.flags);  in intel_gt_set_wedged_on_init()
1473 	set_bit(I915_WEDGED_ON_FINI, &gt->reset.flags);  in intel_gt_set_wedged_on_fini()
1479 	init_waitqueue_head(&gt->reset.queue);  in intel_gt_init_reset()
1480 	mutex_init(&gt->reset.mutex);  in intel_gt_init_reset()
1481 	init_srcu_struct(&gt->reset.backoff_srcu);  in intel_gt_init_reset()
1487 	 * by forcing the reset. Therefore during the reset we must not  in intel_gt_init_reset()
1488 	 * re-enter the shrinker. By declaring that we take the reset mutex  in intel_gt_init_reset()
1490 	 * fs-reclaim or taking related locks during reset.  in intel_gt_init_reset()
1492 	i915_gem_shrinker_taints_mutex(gt->i915, &gt->reset.mutex);  in intel_gt_init_reset()
1495 	__set_bit(I915_WEDGED, &gt->reset.flags);  in intel_gt_init_reset()
1500 	cleanup_srcu_struct(&gt->reset.backoff_srcu);  in intel_gt_fini_reset()