65 		{ 7, 11, -8 }, { 8, 12, -10 }, { 9, 12, -10 }, { 10, 12, -12 },
66 		{ 10, 12, -12 }, { 11, 12, -12 }, { 13, 14, -12 }
71 		{ 0, 8, 0 }, { 3, 10, -2 }, { 7, 12, -2 }, { 8, 12, -4 },
73 		{ 11, 15, -8 }, { 12, 16, -10 }, { 13, 16, -10 },
74 		{ 14, 16, -12 }, { 14, 16, -12 }, { 15, 16, -12 },
75 		{ 17, 18, -12 }
78 	/* 6BPP/12BPC */
80 		{ 0, 12, 0 }, { 5, 14, -2 }, { 11, 16, -2 }, { 12, 16, -4 },
83 		{ 18, 20, -12 }, { 18, 20, -12 }, { 19, 20, -12 },
84 		{ 21, 22, -12 }
92 		{ 22, 24, -12 }, { 22, 24, -12 }, { 23, 24, -12 },
93 		{ 25, 26, -12 }
101 		{ 26, 28, -12 }, { 26, 28, -12 }, { 27, 28, -12 },
102 		{ 29, 30, -12 }
108 	{ 512, 12, 6144, 3, 12, 11, 11, {
111 		{ 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 }, { 5, 12, -12 },
112 		{ 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
116 	{ 512, 12, 6144, 7, 16, 15, 15, {
118 		{ 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
119 		{ 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
120 		{ 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
123 	/* 8BPP/12BPC */
124 	{ 512, 12, 6144, 11, 20, 19, 19, {
125 		{ 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
128 		{ 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
129 		{ 21, 23, -12 }
133 	{ 512, 12, 6144, 15, 24, 23, 23, {
134 		{ 0, 12, 0 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 },
137 		{ 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 },
138 		{ 24, 25, -12 }
142 	{ 512, 12, 6144, 19, 28, 27, 27, {
143 		{ 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 },
146 		{ 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 },
147 		{ 28, 29, -12 }
153 	{ 410, 15, 5632, 3, 12, 11, 11, {
157 		{ 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 }
163 		{ 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
165 		{ 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 }
168 	/* 10BPP/12BPC */
170 		{ 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
173 		{ 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 },
174 		{ 19, 20, -12 }
182 		{ 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 },
183 		{ 23, 24, -12 }
191 		{ 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 },
192 		{ 27, 28, -12 }
197 	/* 12BPP/8BPC */
198 	{ 341, 15, 2048, 3, 12, 11, 11, {
202 		{ 5, 12, -12 }, { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
205 	/* 12BPP/10BPC */
208 		{ 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
209 		{ 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
210 		{ 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
213 	/* 12BPP/12BPC */
215 		{ 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
218 		{ 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
219 		{ 21, 23, -12 }
222 	/* 12BPP/14BPC */
227 		{ 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 },
228 		{ 22, 23, -12 }
231 	/* 12BPP/16BPC */
236 		{ 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 },
237 		{ 26, 27, -12 }
243 	{ 273, 15, 2048, 3, 12, 11, 11, {
247 		{ 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 }
255 		{ 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 }
258 	/* 15BPP/12BPC */
261 		{ 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
262 		{ 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
263 		{ 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 },
264 		{ 16, 17, -12 }
272 		{ 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 },
273 		{ 20, 21, -12 }
278 		{ 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 },
281 		{ 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 },
282 		{ 24, 25, -12 }
298 	case 12:  in get_row_index_for_rc_params()
314 	case 12:  in get_column_index_for_rc_params()
350 	if (DISPLAY_VER(i915) >= 12)  in intel_dsc_source_support()
363 	if (DISPLAY_VER(i915) >= 12)  in is_pipe_dsc()
384 		0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12  in calculate_rc_params()
387 		2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12  in calculate_rc_params()
390 		2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12  in calculate_rc_params()
393 		10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12  in calculate_rc_params()
400 			12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);  in calculate_rc_params()
405 	if (bpp >= 12)  in calculate_rc_params()
418 	rc->flatness_max_qp = 12 + qp_bpc_modifier;  in calculate_rc_params()
438 		} else if (bpp <= 12) {  in calculate_rc_params()
442 			res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);  in calculate_rc_params()
485 	 * For 6bpp, RC Buffer threshold 12 and 13 need a different value  in intel_dsc_compute_params()
489 		vdsc_cfg->rc_buf_thresh[12] = 0x7C;  in intel_dsc_compute_params()
564 	 *  - Display version 12 (except RKL) pipe A  in intel_dsc_power_domain()
570 	if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A)  in intel_dsc_power_domain()