26  * New plane/sprite handling.
28  * The older chips had a separate interface for programming plane related
29  * registers; newer ones are much simpler and we can use the new DRM plane
58 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);  in intel_plane_check_src_coordinates()
127 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in chv_sprite_update_csc()  local
128 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in chv_sprite_update_csc()
130 	enum plane_id plane_id = plane->id;  in chv_sprite_update_csc()
199 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in vlv_sprite_update_clrc()  local
200 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_clrc()
202 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_clrc()
203 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_clrc()
402 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in vlv_sprite_update_gamma()  local
403 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_gamma()
405 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_gamma()
406 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_gamma()
424 vlv_sprite_update_noarm(struct intel_plane *plane,  in vlv_sprite_update_noarm()  argument
428 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_noarm()
429 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_noarm()
430 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_noarm()
445 vlv_sprite_update_arm(struct intel_plane *plane,  in vlv_sprite_update_arm()  argument
449 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_arm()
450 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_arm()
451 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_arm()
481 	 * The control register self-arms if the plane was previously  in vlv_sprite_update_arm()
482 	 * disabled. Try to make the plane enable atomic by writing  in vlv_sprite_update_arm()
494 vlv_sprite_disable_arm(struct intel_plane *plane,  in vlv_sprite_disable_arm()  argument
497 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_disable_arm()
498 	enum pipe pipe = plane->pipe;  in vlv_sprite_disable_arm()
499 	enum plane_id plane_id = plane->id;  in vlv_sprite_disable_arm()
506 vlv_sprite_get_hw_state(struct intel_plane *plane,  in vlv_sprite_get_hw_state()  argument
509 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_get_hw_state()
511 	enum plane_id plane_id = plane->id;  in vlv_sprite_get_hw_state()
515 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in vlv_sprite_get_hw_state()
520 	ret = intel_de_read(dev_priv, SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;  in vlv_sprite_get_hw_state()
522 	*pipe = plane->pipe;  in vlv_sprite_get_hw_state()
703 		to_i915(plane_state->uapi.plane->dev);  in ivb_need_sprite_gamma()
714 		to_i915(plane_state->uapi.plane->dev);  in ivb_sprite_ctl()
811 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in ivb_sprite_update_gamma()  local
812 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_gamma()
813 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_gamma()
839 ivb_sprite_update_noarm(struct intel_plane *plane,  in ivb_sprite_update_noarm()  argument
843 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_noarm()
844 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_noarm()
869 ivb_sprite_update_arm(struct intel_plane *plane,  in ivb_sprite_update_arm()  argument
873 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_arm()
874 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_arm()
904 	 * The control register self-arms if the plane was previously  in ivb_sprite_update_arm()
905 	 * disabled. Try to make the plane enable atomic by writing  in ivb_sprite_update_arm()
916 ivb_sprite_disable_arm(struct intel_plane *plane,  in ivb_sprite_disable_arm()  argument
919 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_disable_arm()
920 	enum pipe pipe = plane->pipe;  in ivb_sprite_disable_arm()
930 ivb_sprite_get_hw_state(struct intel_plane *plane,  in ivb_sprite_get_hw_state()  argument
933 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_get_hw_state()
938 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in ivb_sprite_get_hw_state()
943 	ret =  intel_de_read(dev_priv, SPRCTL(plane->pipe)) & SPRITE_ENABLE;  in ivb_sprite_get_hw_state()
945 	*pipe = plane->pipe;  in ivb_sprite_get_hw_state()
999 g4x_sprite_max_stride(struct intel_plane *plane,  in g4x_sprite_max_stride()  argument
1014 hsw_sprite_max_stride(struct intel_plane *plane,  in hsw_sprite_max_stride()  argument
1042 		to_i915(plane_state->uapi.plane->dev);  in g4x_sprite_ctl()
1111 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in g4x_sprite_update_gamma()  local
1112 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_gamma()
1114 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_gamma()
1141 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in ilk_sprite_update_gamma()  local
1142 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ilk_sprite_update_gamma()
1144 	enum pipe pipe = plane->pipe;  in ilk_sprite_update_gamma()
1166 g4x_sprite_update_noarm(struct intel_plane *plane,  in g4x_sprite_update_noarm()  argument
1170 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_noarm()
1171 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_noarm()
1195 g4x_sprite_update_arm(struct intel_plane *plane,  in g4x_sprite_update_arm()  argument
1199 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_arm()
1200 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_arm()
1222 	 * The control register self-arms if the plane was previously  in g4x_sprite_update_arm()
1223 	 * disabled. Try to make the plane enable atomic by writing  in g4x_sprite_update_arm()
1237 g4x_sprite_disable_arm(struct intel_plane *plane,  in g4x_sprite_disable_arm()  argument
1240 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_disable_arm()
1241 	enum pipe pipe = plane->pipe;  in g4x_sprite_disable_arm()
1250 g4x_sprite_get_hw_state(struct intel_plane *plane,  in g4x_sprite_get_hw_state()  argument
1253 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_get_hw_state()
1258 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in g4x_sprite_get_hw_state()
1263 	ret = intel_de_read(dev_priv, DVSCNTR(plane->pipe)) & DVS_ENABLE;  in g4x_sprite_get_hw_state()
1265 	*pipe = plane->pipe;  in g4x_sprite_get_hw_state()
1293 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);  in g4x_sprite_check_scaling()
1355 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in g4x_sprite_check()  local
1356 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_check()
1401 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in chv_plane_check_rotation()  local
1402 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in chv_plane_check_rotation()
1458 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_set_ckey()  local
1459 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in intel_plane_set_ckey()
1468 	if (plane->id == PLANE_PRIMARY &&  in intel_plane_set_ckey()
1476 	if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_PRIMARY &&  in intel_plane_set_ckey()
1486 	struct drm_plane *plane;  in intel_sprite_set_colorkey_ioctl()  local
1506 	plane = drm_plane_find(dev, file_priv, set->plane_id);  in intel_sprite_set_colorkey_ioctl()
1507 	if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY)  in intel_sprite_set_colorkey_ioctl()
1511 	 * SKL+ only plane 2 can do destination keying against plane 1.  in intel_sprite_set_colorkey_ioctl()
1516 	    to_intel_plane(plane)->id >= PLANE_SPRITE1 &&  in intel_sprite_set_colorkey_ioctl()
1522 	state = drm_atomic_state_alloc(plane->dev);  in intel_sprite_set_colorkey_ioctl()
1530 		plane_state = drm_atomic_get_plane_state(state, plane);  in intel_sprite_set_colorkey_ioctl()
1537 		 * the dst colorkey on the primary plane.  in intel_sprite_set_colorkey_ioctl()
1542 						    to_intel_plane(plane)->pipe);  in intel_sprite_set_colorkey_ioctl()
1729 	struct intel_plane *plane;  in intel_sprite_plane_create()  local
1737 	plane = intel_plane_alloc();  in intel_sprite_plane_create()
1738 	if (IS_ERR(plane))  in intel_sprite_plane_create()
1739 		return plane;  in intel_sprite_plane_create()
1742 		plane->update_noarm = vlv_sprite_update_noarm;  in intel_sprite_plane_create()
1743 		plane->update_arm = vlv_sprite_update_arm;  in intel_sprite_plane_create()
1744 		plane->disable_arm = vlv_sprite_disable_arm;  in intel_sprite_plane_create()
1745 		plane->get_hw_state = vlv_sprite_get_hw_state;  in intel_sprite_plane_create()
1746 		plane->check_plane = vlv_sprite_check;  in intel_sprite_plane_create()
1747 		plane->max_stride = i965_plane_max_stride;  in intel_sprite_plane_create()
1748 		plane->min_cdclk = vlv_plane_min_cdclk;  in intel_sprite_plane_create()
1760 		plane->update_noarm = ivb_sprite_update_noarm;  in intel_sprite_plane_create()
1761 		plane->update_arm = ivb_sprite_update_arm;  in intel_sprite_plane_create()
1762 		plane->disable_arm = ivb_sprite_disable_arm;  in intel_sprite_plane_create()
1763 		plane->get_hw_state = ivb_sprite_get_hw_state;  in intel_sprite_plane_create()
1764 		plane->check_plane = g4x_sprite_check;  in intel_sprite_plane_create()
1767 			plane->max_stride = hsw_sprite_max_stride;  in intel_sprite_plane_create()
1768 			plane->min_cdclk = hsw_plane_min_cdclk;  in intel_sprite_plane_create()
1770 			plane->max_stride = g4x_sprite_max_stride;  in intel_sprite_plane_create()
1771 			plane->min_cdclk = ivb_sprite_min_cdclk;  in intel_sprite_plane_create()
1779 		plane->update_noarm = g4x_sprite_update_noarm;  in intel_sprite_plane_create()
1780 		plane->update_arm = g4x_sprite_update_arm;  in intel_sprite_plane_create()
1781 		plane->disable_arm = g4x_sprite_disable_arm;  in intel_sprite_plane_create()
1782 		plane->get_hw_state = g4x_sprite_get_hw_state;  in intel_sprite_plane_create()
1783 		plane->check_plane = g4x_sprite_check;  in intel_sprite_plane_create()
1784 		plane->max_stride = g4x_sprite_max_stride;  in intel_sprite_plane_create()
1785 		plane->min_cdclk = g4x_sprite_min_cdclk;  in intel_sprite_plane_create()
1809 	plane->pipe = pipe;  in intel_sprite_plane_create()
1810 	plane->id = PLANE_SPRITE0 + sprite;  in intel_sprite_plane_create()
1811 	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);  in intel_sprite_plane_create()
1815 	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,  in intel_sprite_plane_create()
1825 	drm_plane_create_rotation_property(&plane->base,  in intel_sprite_plane_create()
1829 	drm_plane_create_color_properties(&plane->base,  in intel_sprite_plane_create()
1838 	drm_plane_create_zpos_immutable_property(&plane->base, zpos);  in intel_sprite_plane_create()
1840 	intel_plane_helper_add(plane);  in intel_sprite_plane_create()
1842 	return plane;  in intel_sprite_plane_create()
1845 	intel_plane_free(plane);  in intel_sprite_plane_create()