695 	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;  in dc3co_is_pipe_port_compatible()
709 	const u32 crtc_vdisplay = crtc_state->uapi.adjusted_mode.crtc_vdisplay;  in tgl_dc3co_exitline_compute_config()
742 		intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 200) + 1;  in tgl_dc3co_exitline_compute_config()
762 	if (crtc_state->uapi.async_flip) {  in intel_psr2_sel_fetch_config_valid()
819 	const struct drm_display_mode *adjusted_mode = &crtc_state->uapi.adjusted_mode;  in _compute_psr2_sdp_prior_scanline_indication()
1191 			vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal -  in intel_psr_enable_source()
1192 				 crtc_state->uapi.adjusted_mode.crtc_vdisplay;  in intel_psr_enable_source()
1193 			vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end -  in intel_psr_enable_source()
1194 				 crtc_state->uapi.adjusted_mode.crtc_vblank_start;  in intel_psr_enable_source()
1244 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;  in intel_psr_enable_locked()
1557 	val = (clip->y1 + plane_state->uapi.dst.y1) << 16;  in intel_psr2_program_plane_sel_fetch()
1558 	val |= plane_state->uapi.dst.x1;  in intel_psr2_program_plane_sel_fetch()
1579 	val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1;  in intel_psr2_program_plane_sel_fetch()
1588 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);  in intel_psr2_program_trans_man_trk_ctl()
1595 					     crtc_state->uapi.encoder_mask) {  in intel_psr2_program_trans_man_trk_ctl()
1611 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);  in psr2_man_trk_ctl_calc()
1634 		drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 || clip->y2 % 4);  in psr2_man_trk_ctl_calc()
1666 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);  in intel_psr2_sel_fetch_pipe_alignment()
1688 	if (plane_state->uapi.dst.y1 < 0 ||  in psr2_sel_fetch_plane_state_supported()
1689 	    plane_state->uapi.dst.x1 < 0 ||  in psr2_sel_fetch_plane_state_supported()
1691 	    plane_state->uapi.rotation != DRM_MODE_ROTATE_0)  in psr2_sel_fetch_plane_state_supported()
1742 		if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc)  in intel_psr2_sel_fetch_update()
1745 		if (!new_plane_state->uapi.visible &&  in intel_psr2_sel_fetch_update()
1746 		    !old_plane_state->uapi.visible)  in intel_psr2_sel_fetch_update()
1759 		if (new_plane_state->uapi.visible != old_plane_state->uapi.visible ||  in intel_psr2_sel_fetch_update()
1760 		    !drm_rect_equals(&new_plane_state->uapi.dst,  in intel_psr2_sel_fetch_update()
1761 				     &old_plane_state->uapi.dst)) {  in intel_psr2_sel_fetch_update()
1762 			if (old_plane_state->uapi.visible) {  in intel_psr2_sel_fetch_update()
1763 				damaged_area.y1 = old_plane_state->uapi.dst.y1;  in intel_psr2_sel_fetch_update()
1764 				damaged_area.y2 = old_plane_state->uapi.dst.y2;  in intel_psr2_sel_fetch_update()
1769 			if (new_plane_state->uapi.visible) {  in intel_psr2_sel_fetch_update()
1770 				damaged_area.y1 = new_plane_state->uapi.dst.y1;  in intel_psr2_sel_fetch_update()
1771 				damaged_area.y2 = new_plane_state->uapi.dst.y2;  in intel_psr2_sel_fetch_update()
1776 		} else if (new_plane_state->uapi.alpha != old_plane_state->uapi.alpha) {  in intel_psr2_sel_fetch_update()
1778 			damaged_area.y1 = new_plane_state->uapi.dst.y1;  in intel_psr2_sel_fetch_update()
1779 			damaged_area.y2 = new_plane_state->uapi.dst.y2;  in intel_psr2_sel_fetch_update()
1785 		src = drm_plane_state_src(&new_plane_state->uapi);  in intel_psr2_sel_fetch_update()
1788 		if (!drm_atomic_helper_damage_merged(&old_plane_state->uapi,  in intel_psr2_sel_fetch_update()
1789 						     &new_plane_state->uapi, &damaged_area))  in intel_psr2_sel_fetch_update()
1792 		damaged_area.y1 += new_plane_state->uapi.dst.y1 - src.y1;  in intel_psr2_sel_fetch_update()
1793 		damaged_area.y2 += new_plane_state->uapi.dst.y1 - src.y1;  in intel_psr2_sel_fetch_update()
1794 		damaged_area.x1 += new_plane_state->uapi.dst.x1 - src.x1;  in intel_psr2_sel_fetch_update()
1795 		damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;  in intel_psr2_sel_fetch_update()
1831 		if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc ||  in intel_psr2_sel_fetch_update()
1832 		    !new_plane_state->uapi.visible)  in intel_psr2_sel_fetch_update()
1836 		if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst))  in intel_psr2_sel_fetch_update()
1845 		sel_fetch_area->y1 = inter.y1 - new_plane_state->uapi.dst.y1;  in intel_psr2_sel_fetch_update()
1846 		sel_fetch_area->y2 = inter.y2 - new_plane_state->uapi.dst.y1;  in intel_psr2_sel_fetch_update()
1887 					     old_crtc_state->uapi.encoder_mask) {  in intel_psr_pre_plane_update()
1922 					     crtc_state->uapi.encoder_mask) {  in _intel_psr_post_plane_update()
1998 	struct drm_i915_private *dev_priv = to_i915(new_crtc_state->uapi.crtc->dev);  in intel_psr_wait_for_idle_locked()
2005 					     new_crtc_state->uapi.encoder_mask) {  in intel_psr_wait_for_idle_locked()
2576 	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);  in intel_psr_lock()
2583 					     crtc_state->uapi.encoder_mask) {  in intel_psr_lock()
2599 	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);  in intel_psr_unlock()
2606 					     crtc_state->uapi.encoder_mask) {  in intel_psr_unlock()