310 int pnv_calc_dpll_params(int refclk, struct dpll *clock)  in pnv_calc_dpll_params()  argument
316 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in pnv_calc_dpll_params()
327 int i9xx_calc_dpll_params(int refclk, struct dpll *clock)  in i9xx_calc_dpll_params()  argument
333 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);  in i9xx_calc_dpll_params()
339 int vlv_calc_dpll_params(int refclk, struct dpll *clock)  in vlv_calc_dpll_params()  argument
345 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in vlv_calc_dpll_params()
351 int chv_calc_dpll_params(int refclk, struct dpll *clock)  in chv_calc_dpll_params()  argument
357 	clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m),  in chv_calc_dpll_params()
440 		    int target, int refclk,  in i9xx_find_best_dpll()  argument
464 					i9xx_calc_dpll_params(refclk, &clock);  in i9xx_find_best_dpll()
498 		   int target, int refclk,  in pnv_find_best_dpll()  argument
520 					pnv_calc_dpll_params(refclk, &clock);  in pnv_find_best_dpll()
554 		   int target, int refclk,  in g4x_find_best_dpll()  argument
581 					i9xx_calc_dpll_params(refclk, &clock);  in g4x_find_best_dpll()
648 		   int target, int refclk,  in vlv_find_best_dpll()  argument
657 	int max_n = min(limit->n.max, refclk / 19200);  in vlv_find_best_dpll()
673 								     refclk * clock.m1);  in vlv_find_best_dpll()
675 					vlv_calc_dpll_params(refclk, &clock);  in vlv_find_best_dpll()
706 		   int target, int refclk,  in chv_find_best_dpll()  argument
737 						   refclk * clock.m1);  in chv_find_best_dpll()
744 			chv_calc_dpll_params(refclk, &clock);  in chv_find_best_dpll()
766 	int refclk = 100000;  in bxt_find_best_dpll()  local
769 				  crtc_state->port_clock, refclk,  in bxt_find_best_dpll()
1118 	int refclk = 120000;  in ilk_crtc_compute_clock()  local
1130 			refclk = dev_priv->display.vbt.lvds_ssc_freq;  in ilk_crtc_compute_clock()
1134 			if (refclk == 100000)  in ilk_crtc_compute_clock()
1139 			if (refclk == 100000)  in ilk_crtc_compute_clock()
1150 				refclk, NULL, &crtc_state->dpll))  in ilk_crtc_compute_clock()
1220 	int refclk = 100000;  in chv_crtc_compute_clock()  local
1224 				refclk, NULL, &crtc_state->dpll))  in chv_crtc_compute_clock()
1245 	int refclk = 100000;  in vlv_crtc_compute_clock()  local
1249 				refclk, NULL, &crtc_state->dpll)) {  in vlv_crtc_compute_clock()
1272 	int refclk = 96000;  in g4x_crtc_compute_clock()  local
1276 			refclk = dev_priv->display.vbt.lvds_ssc_freq;  in g4x_crtc_compute_clock()
1279 				    refclk);  in g4x_crtc_compute_clock()
1298 				refclk, NULL, &crtc_state->dpll))  in g4x_crtc_compute_clock()
1319 	int refclk = 96000;  in pnv_crtc_compute_clock()  local
1323 			refclk = dev_priv->display.vbt.lvds_ssc_freq;  in pnv_crtc_compute_clock()
1326 				    refclk);  in pnv_crtc_compute_clock()
1336 				refclk, NULL, &crtc_state->dpll))  in pnv_crtc_compute_clock()
1355 	int refclk = 96000;  in i9xx_crtc_compute_clock()  local
1359 			refclk = dev_priv->display.vbt.lvds_ssc_freq;  in i9xx_crtc_compute_clock()
1362 				    refclk);  in i9xx_crtc_compute_clock()
1372 				 refclk, NULL, &crtc_state->dpll))  in i9xx_crtc_compute_clock()
1393 	int refclk = 48000;  in i8xx_crtc_compute_clock()  local
1397 			refclk = dev_priv->display.vbt.lvds_ssc_freq;  in i8xx_crtc_compute_clock()
1400 				    refclk);  in i8xx_crtc_compute_clock()
1412 				 refclk, NULL, &crtc_state->dpll))  in i8xx_crtc_compute_clock()