568 				       u8 lane_count)  in intel_dp_link_params_valid()  argument
579 	if (lane_count == 0 ||  in intel_dp_link_params_valid()
580 	    lane_count > intel_dp_max_lane_count(intel_dp))  in intel_dp_link_params_valid()
588 						     u8 lane_count)  in intel_dp_can_link_train_fallback_for_edp()  argument
596 	max_rate = intel_dp_max_data_rate(link_rate, lane_count);  in intel_dp_can_link_train_fallback_for_edp()
604 					    int link_rate, u8 lane_count)  in intel_dp_get_link_train_fallback_values()  argument
632 							      lane_count)) {  in intel_dp_get_link_train_fallback_values()
638 		intel_dp->max_link_lane_count = lane_count;  in intel_dp_get_link_train_fallback_values()
639 	} else if (lane_count > 1) {  in intel_dp_get_link_train_fallback_values()
643 							      lane_count >> 1)) {  in intel_dp_get_link_train_fallback_values()
649 		intel_dp->max_link_lane_count = lane_count >> 1;  in intel_dp_get_link_train_fallback_values()
676 				       u32 link_clock, u32 lane_count,  in intel_dp_dsc_get_output_bpp()  argument
690 	bits_per_pixel = (link_clock * lane_count * 8) /  in intel_dp_dsc_get_output_bpp()
1332 	int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state);  in intel_dp_compute_link_config_wide()  local
1346 			for (lane_count = limits->min_lane_count;  in intel_dp_compute_link_config_wide()
1347 			     lane_count <= limits->max_lane_count;  in intel_dp_compute_link_config_wide()
1348 			     lane_count <<= 1) {  in intel_dp_compute_link_config_wide()
1350 								    lane_count);  in intel_dp_compute_link_config_wide()
1353 					pipe_config->lane_count = lane_count;  in intel_dp_compute_link_config_wide()
1506 	pipe_config->lane_count = limits->max_lane_count;  in intel_dp_dsc_compute_config()
1522 						    pipe_config->lane_count,  in intel_dp_dsc_compute_config()
1653 			    pipe_config->lane_count, pipe_config->port_clock,  in intel_dp_compute_link_config()
1662 						   pipe_config->lane_count));  in intel_dp_compute_link_config()
1665 			    pipe_config->lane_count, pipe_config->port_clock,  in intel_dp_compute_link_config()
1673 						   pipe_config->lane_count));  in intel_dp_compute_link_config()
1944 	intel_link_compute_m_n(output_bpp, pipe_config->lane_count, pixel_clock,  in intel_dp_drrs_compute_config()
2095 			       pipe_config->lane_count,  in intel_dp_compute_config()
2118 			      int link_rate, int lane_count)  in intel_dp_set_link_params()  argument
2123 	intel_dp->lane_count = lane_count;  in intel_dp_set_link_params()
3760 			  intel_dp->train_set, crtc_state->lane_count);  in intel_dp_process_phy_request()
3840 							  intel_dp->lane_count);  in intel_dp_link_ok()
3842 		ok = drm_dp_channel_eq_ok(link_status, intel_dp->lane_count);  in intel_dp_link_ok()
3999 					intel_dp->lane_count))  in intel_dp_needs_link_retrain()