755 	max_slice_width = drm_dp_dsc_sink_max_slice_width(intel_dp->dsc_dpcd);  in intel_dp_dsc_get_slice_count()
772 		    drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, false))  in intel_dp_dsc_get_slice_count()
1016 	    drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {  in intel_dp_mode_valid()
1025 				drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4;  in intel_dp_mode_valid()
1027 				drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,  in intel_dp_mode_valid()
1177 		drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);  in intel_dp_supports_dsc()
1379 	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd,  in intel_dp_dsc_compute_bpp()
1398 	return (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] & DP_DSC_MINOR_MASK) >>  in intel_dp_sink_dsc_version_minor()
1437 		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &  in intel_dp_dsc_compute_params()
1443 	vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &  in intel_dp_dsc_compute_params()
1446 	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);  in intel_dp_dsc_compute_params()
1461 		intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &  in intel_dp_dsc_compute_params()
1510 			min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,  in intel_dp_dsc_compute_config()
1513 			drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,  in intel_dp_dsc_compute_config()
2708 	memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));  in intel_dp_get_dsc_sink_cap()
2717 				     intel_dp->dsc_dpcd,  in intel_dp_get_dsc_sink_cap()
2718 				     sizeof(intel_dp->dsc_dpcd)) < 0)  in intel_dp_get_dsc_sink_cap()
2724 			    (int)sizeof(intel_dp->dsc_dpcd),  in intel_dp_get_dsc_sink_cap()
2725 			    intel_dp->dsc_dpcd);  in intel_dp_get_dsc_sink_cap()
4675 		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));  in intel_dp_detect()