2460 	u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;  in ilk_pipe_pixel_rate()
2507 			crtc_state->hw.pipe_mode.crtc_clock;  in intel_crtc_compute_pixel_rate()
2557 	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;  in intel_crtc_readout_derived_state()  local
2564 	drm_mode_copy(pipe_mode, adjusted_mode);  in intel_crtc_readout_derived_state()
2567 	intel_splitter_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_readout_derived_state()
2574 	intel_mode_from_crtc_timings(adjusted_mode, pipe_mode);  in intel_crtc_readout_derived_state()
2577 	drm_mode_copy(mode, pipe_mode);  in intel_crtc_readout_derived_state()
2584 	intel_bigjoiner_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_readout_derived_state()
2585 	intel_mode_from_crtc_timings(pipe_mode, pipe_mode);  in intel_crtc_readout_derived_state()
2651 	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;  in intel_crtc_compute_pipe_mode()  local
2658 	drm_mode_copy(pipe_mode, adjusted_mode);  in intel_crtc_compute_pipe_mode()
2661 	intel_splitter_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_compute_pipe_mode()
2664 	intel_bigjoiner_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_compute_pipe_mode()
2665 	intel_mode_from_crtc_timings(pipe_mode, pipe_mode);  in intel_crtc_compute_pipe_mode()
2675 		    pipe_mode->crtc_clock > clock_limit) {  in intel_crtc_compute_pipe_mode()
2681 	if (pipe_mode->crtc_clock > clock_limit) {  in intel_crtc_compute_pipe_mode()
2685 			    pipe_mode->crtc_clock, clock_limit,  in intel_crtc_compute_pipe_mode()
4748 	const struct drm_display_mode *pipe_mode =  in hsw_linetime_wm()  local
4749 		&crtc_state->hw.pipe_mode;  in hsw_linetime_wm()
4755 	linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,  in hsw_linetime_wm()
4756 					pipe_mode->crtc_clock);  in hsw_linetime_wm()
4764 	const struct drm_display_mode *pipe_mode =  in hsw_ips_linetime_wm()  local
4765 		&crtc_state->hw.pipe_mode;  in hsw_ips_linetime_wm()
4771 	linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,  in hsw_ips_linetime_wm()
4781 	const struct drm_display_mode *pipe_mode =  in skl_linetime_wm()  local
4782 		&crtc_state->hw.pipe_mode;  in skl_linetime_wm()
4788 	linetime_wm = DIV_ROUND_UP(pipe_mode->crtc_htotal * 1000 * 8,  in skl_linetime_wm()
5149 	drm_mode_copy(&slave_crtc_state->hw.pipe_mode,  in copy_bigjoiner_crtc_state_modeset()
5150 		      &master_crtc_state->hw.pipe_mode);  in copy_bigjoiner_crtc_state_modeset()
5756 	PIPE_CONF_CHECK_TIMINGS(hw.pipe_mode);  in intel_pipe_config_compare()
5878 		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);  in intel_pipe_config_compare()