290 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_ddi_init_dp_buf_reg()  local
295 	intel_dp->DP = dig_port->saved_port_bits |  in intel_ddi_init_dp_buf_reg()
300 		intel_dp->DP |= ddi_buf_phy_link_rate(crtc_state->port_clock);  in intel_ddi_init_dp_buf_reg()
302 			intel_dp->DP |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;  in intel_ddi_init_dp_buf_reg()
991 static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,  in intel_ddi_dp_voltage_max()  argument
994 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in intel_ddi_dp_voltage_max()
1015 static u8 intel_ddi_dp_preemph_max(struct intel_dp *intel_dp)  in intel_ddi_dp_preemph_max()  argument
1046 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in icl_ddi_combo_vswing_program()  local
1049 		intel_dp->hobl_active = is_hobl_buf_trans(trans);  in icl_ddi_combo_vswing_program()
1051 			     intel_dp->hobl_active ? val : 0);  in icl_ddi_combo_vswing_program()
1315 static int translate_signal_level(struct intel_dp *intel_dp,  in translate_signal_level()  argument
1318 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in translate_signal_level()
1333 static int intel_ddi_dp_level(struct intel_dp *intel_dp,  in intel_ddi_dp_level()  argument
1337 	u8 train_set = intel_dp->train_set[lane];  in intel_ddi_dp_level()
1345 		return translate_signal_level(intel_dp, signal_levels);  in intel_ddi_dp_level()
1378 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in hsw_set_signal_levels()  local
1395 	intel_dp->DP &= ~DDI_BUF_EMP_MASK;  in hsw_set_signal_levels()
1396 	intel_dp->DP |= signal_levels;  in hsw_set_signal_levels()
1398 	intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);  in hsw_set_signal_levels()
2121 static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel_dp,  in intel_dp_sink_set_msa_timing_par_ignore_state()  argument
2125 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in intel_dp_sink_set_msa_timing_par_ignore_state()
2130 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL,  in intel_dp_sink_set_msa_timing_par_ignore_state()
2137 static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,  in intel_dp_sink_set_fec_ready()  argument
2140 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in intel_dp_sink_set_fec_ready()
2145 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, DP_FEC_READY) <= 0)  in intel_dp_sink_set_fec_ready()
2154 	struct intel_dp *intel_dp;  in intel_ddi_enable_fec()  local
2160 	intel_dp = enc_to_intel_dp(encoder);  in intel_ddi_enable_fec()
2170 	struct intel_dp *intel_dp;  in intel_ddi_disable_fec_state()  local
2176 	intel_dp = enc_to_intel_dp(encoder);  in intel_ddi_disable_fec_state()
2276 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in tgl_ddi_pre_enable_dp()  local
2281 	intel_dp_set_link_params(intel_dp,  in tgl_ddi_pre_enable_dp()
2299 	intel_pps_on(intel_dp);  in tgl_ddi_pre_enable_dp()
2376 		intel_dp_set_power(intel_dp, DP_SET_POWER_D0);  in tgl_ddi_pre_enable_dp()
2378 	intel_dp_configure_protocol_converter(intel_dp, crtc_state);  in tgl_ddi_pre_enable_dp()
2379 	intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);  in tgl_ddi_pre_enable_dp()
2385 	intel_dp_sink_set_fec_ready(intel_dp, crtc_state);  in tgl_ddi_pre_enable_dp()
2387 	intel_dp_check_frl_training(intel_dp);  in tgl_ddi_pre_enable_dp()
2388 	intel_dp_pcon_dsc_configure(intel_dp, crtc_state);  in tgl_ddi_pre_enable_dp()
2397 	intel_dp_start_link_train(intel_dp, crtc_state);  in tgl_ddi_pre_enable_dp()
2401 		intel_dp_stop_link_train(intel_dp, crtc_state);  in tgl_ddi_pre_enable_dp()
2414 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in hsw_ddi_pre_enable_dp()  local
2426 	intel_dp_set_link_params(intel_dp,  in hsw_ddi_pre_enable_dp()
2436 	intel_pps_on(intel_dp);  in hsw_ddi_pre_enable_dp()
2456 		intel_dp_set_power(intel_dp, DP_SET_POWER_D0);  in hsw_ddi_pre_enable_dp()
2457 	intel_dp_configure_protocol_converter(intel_dp, crtc_state);  in hsw_ddi_pre_enable_dp()
2458 	intel_dp_sink_set_decompression_state(intel_dp, crtc_state,  in hsw_ddi_pre_enable_dp()
2460 	intel_dp_sink_set_fec_ready(intel_dp, crtc_state);  in hsw_ddi_pre_enable_dp()
2461 	intel_dp_start_link_train(intel_dp, crtc_state);  in hsw_ddi_pre_enable_dp()
2464 		intel_dp_stop_link_train(intel_dp, crtc_state);  in hsw_ddi_pre_enable_dp()
2598 	struct intel_dp *intel_dp = &dig_port->dp;  in intel_ddi_post_disable_dp()  local
2610 	intel_dp_set_power(intel_dp, DP_SET_POWER_D3);  in intel_ddi_post_disable_dp()
2640 	intel_pps_vdd_on(intel_dp);  in intel_ddi_post_disable_dp()
2641 	intel_pps_off(intel_dp);  in intel_ddi_post_disable_dp()
2791 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_enable_ddi_dp()  local
2796 		intel_dp_stop_link_train(intel_dp, crtc_state);  in intel_enable_ddi_dp()
2941 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_disable_ddi_dp()  local
2943 	intel_dp->link_trained = false;  in intel_disable_ddi_dp()
2947 	intel_psr_disable(intel_dp, old_crtc_state);  in intel_disable_ddi_dp()
2950 	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,  in intel_disable_ddi_dp()
2953 	intel_dp_sink_set_msa_timing_par_ignore_state(intel_dp, old_crtc_state,  in intel_disable_ddi_dp()
3091 static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,  in intel_ddi_prepare_link_retrain()  argument
3094 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_ddi_prepare_link_retrain()
3125 		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))  in intel_ddi_prepare_link_retrain()
3135 	intel_dp->DP |= DDI_BUF_CTL_ENABLE;  in intel_ddi_prepare_link_retrain()
3136 	intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);  in intel_ddi_prepare_link_retrain()
3142 static void intel_ddi_set_link_train(struct intel_dp *intel_dp,  in intel_ddi_set_link_train()  argument
3146 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in intel_ddi_set_link_train()
3174 static void intel_ddi_set_idle_link_train(struct intel_dp *intel_dp,  in intel_ddi_set_idle_link_train()  argument
3177 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in intel_ddi_set_idle_link_train()
3792 	struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));  in intel_ddi_encoder_reset()  local
3794 	intel_dp->reset_link_params = true;  in intel_ddi_encoder_reset()
3796 	intel_pps_encoder_reset(intel_dp);  in intel_ddi_encoder_reset()
3950 	struct intel_dp *intel_dp = &dig_port->dp;  in intel_ddi_hotplug()  local
3957 	if (intel_dp->compliance.test_active &&  in intel_ddi_hotplug()
3958 	    intel_dp->compliance.test_type == DP_TEST_LINK_PHY_TEST_PATTERN) {  in intel_ddi_hotplug()
4197 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_ddi_encoder_suspend()  local
4198 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in intel_ddi_encoder_suspend()
4199 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_ddi_encoder_suspend()
4212 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_ddi_encoder_shutdown()  local
4213 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in intel_ddi_encoder_shutdown()
4214 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_ddi_encoder_shutdown()