Lines Matching full:ddi
107 * Starting with Haswell, DDI port buffers must be programmed with correct
138 * Starting with Haswell, DDI port buffers must be programmed with correct
178 drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n", in intel_wait_ddi_buf_idle()
197 drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n", in intel_wait_ddi_buf_active()
617 "Quirk Increase DDI disabled time\n"); in intel_ddi_disable_transcoder_func()
1012 * used on all DDI platforms. Should that change we need to
1988 * For DSI we keep the ddi clocks gated in intel_ddi_sanitize_encoder_pll_mapping()
1999 "[ENCODER:%d:%s] is disabled/in DSI mode with an ungated DDI clock, gate it\n", in intel_ddi_sanitize_encoder_pll_mapping()
2348 * 7.b Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST in tgl_ddi_pre_enable_dp()
2366 * the used lanes of the DDI. in tgl_ddi_pre_enable_dp()
2381 * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit in tgl_ddi_pre_enable_dp()
2858 * the bits affect a specific DDI port rather than in intel_enable_ddi_hdmi()
4297 "DDI %c/PHY %c", in intel_ddi_init()
4305 "DDI %s%c/PHY %s%c", in intel_ddi_init()
4315 "DDI %c%s/PHY %s%c", in intel_ddi_init()
4323 "DDI %c/PHY %c", port_name(port), phy_name(phy)); in intel_ddi_init()