55 		      struct intel_crtc_state *pipe_config)  in g4x_dp_set_clock()  argument
77 			if (pipe_config->port_clock == divisor[i].dot) {  in g4x_dp_set_clock()
78 				pipe_config->dpll = divisor[i];  in g4x_dp_set_clock()
79 				pipe_config->clock_set = true;  in g4x_dp_set_clock()
87 			     const struct intel_crtc_state *pipe_config)  in intel_dp_prepare()  argument
92 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);  in intel_dp_prepare()
93 	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;  in intel_dp_prepare()
96 				 pipe_config->port_clock,  in intel_dp_prepare()
97 				 pipe_config->lane_count);  in intel_dp_prepare()
122 	intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count);  in intel_dp_prepare()
149 		if (IS_G4X(dev_priv) && pipe_config->limited_color_range)  in intel_dp_prepare()
193 			   const struct intel_crtc_state *pipe_config)  in ilk_edp_pll_on()  argument
195 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);  in ilk_edp_pll_on()
198 	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);  in ilk_edp_pll_on()
203 		    pipe_config->port_clock);  in ilk_edp_pll_on()
207 	if (pipe_config->port_clock == 162000)  in ilk_edp_pll_on()
335 				struct intel_crtc_state *pipe_config)  in intel_dp_get_config()  argument
341 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);  in intel_dp_get_config()
344 		pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP);  in intel_dp_get_config()
346 		pipe_config->output_types |= BIT(INTEL_OUTPUT_DP);  in intel_dp_get_config()
350 	pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;  in intel_dp_get_config()
377 	pipe_config->hw.adjusted_mode.flags |= flags;  in intel_dp_get_config()
380 		pipe_config->limited_color_range = true;  in intel_dp_get_config()
382 	pipe_config->lane_count =  in intel_dp_get_config()
385 	g4x_dp_get_m_n(pipe_config);  in intel_dp_get_config()
389 			pipe_config->port_clock = 162000;  in intel_dp_get_config()
391 			pipe_config->port_clock = 270000;  in intel_dp_get_config()
394 	pipe_config->hw.adjusted_mode.crtc_clock =  in intel_dp_get_config()
395 		intel_dotclock_calculate(pipe_config->port_clock,  in intel_dp_get_config()
396 					 &pipe_config->dp_m_n);  in intel_dp_get_config()
399 		intel_edp_fixup_vbt_bpp(encoder, pipe_config->pipe_bpp);  in intel_dp_get_config()
637 			    const struct intel_crtc_state *pipe_config,  in intel_enable_dp()  argument
650 			vlv_pps_init(encoder, pipe_config);  in intel_enable_dp()
652 		intel_dp_enable_port(intel_dp, pipe_config);  in intel_enable_dp()
663 			lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count);  in intel_enable_dp()
670 	intel_dp_configure_protocol_converter(intel_dp, pipe_config);  in intel_enable_dp()
672 	intel_dp_pcon_dsc_configure(intel_dp, pipe_config);  in intel_enable_dp()
673 	intel_dp_start_link_train(intel_dp, pipe_config);  in intel_enable_dp()
674 	intel_dp_stop_link_train(intel_dp, pipe_config);  in intel_enable_dp()
676 	intel_audio_codec_enable(encoder, pipe_config, conn_state);  in intel_enable_dp()
681 			  const struct intel_crtc_state *pipe_config,  in g4x_enable_dp()  argument
684 	intel_enable_dp(state, encoder, pipe_config, conn_state);  in g4x_enable_dp()
685 	intel_edp_backlight_on(pipe_config, conn_state);  in g4x_enable_dp()
690 			  const struct intel_crtc_state *pipe_config,  in vlv_enable_dp()  argument
693 	intel_edp_backlight_on(pipe_config, conn_state);  in vlv_enable_dp()
698 			      const struct intel_crtc_state *pipe_config,  in g4x_pre_enable_dp()  argument
704 	intel_dp_prepare(encoder, pipe_config);  in g4x_pre_enable_dp()
708 		ilk_edp_pll_on(intel_dp, pipe_config);  in g4x_pre_enable_dp()
713 			      const struct intel_crtc_state *pipe_config,  in vlv_pre_enable_dp()  argument
716 	vlv_phy_pre_encoder_enable(encoder, pipe_config);  in vlv_pre_enable_dp()
718 	intel_enable_dp(state, encoder, pipe_config, conn_state);  in vlv_pre_enable_dp()
723 				  const struct intel_crtc_state *pipe_config,  in vlv_dp_pre_pll_enable()  argument
726 	intel_dp_prepare(encoder, pipe_config);  in vlv_dp_pre_pll_enable()
728 	vlv_phy_pre_pll_enable(encoder, pipe_config);  in vlv_dp_pre_pll_enable()
733 			      const struct intel_crtc_state *pipe_config,  in chv_pre_enable_dp()  argument
736 	chv_phy_pre_encoder_enable(encoder, pipe_config);  in chv_pre_enable_dp()
738 	intel_enable_dp(state, encoder, pipe_config, conn_state);  in chv_pre_enable_dp()
746 				  const struct intel_crtc_state *pipe_config,  in chv_dp_pre_pll_enable()  argument
749 	intel_dp_prepare(encoder, pipe_config);  in chv_dp_pre_pll_enable()
751 	chv_phy_pre_pll_enable(encoder, pipe_config);  in chv_dp_pre_pll_enable()