45 	{ .dot = 162000, .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a /* 32.4 */ },
46 	{ .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 /* 27.0 */ },
51 	return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];  in vlv_get_dpll()
59 	int i, count = 0;  in g4x_dp_set_clock()
76 		for (i = 0; i < count; i++) {  in g4x_dp_set_clock()
339 	u32 tmp, flags = 0;  in intel_dp_get_config()
413 			 DP_PORT_EN) == 0))  in intel_dp_link_down()
660 		unsigned int lane_mask = 0x0;  in intel_enable_dp()
790 	u8 train_set = intel_dp->train_set[0];  in vlv_set_signal_levels()
794 		preemph_reg_value = 0x0004000;  in vlv_set_signal_levels()
797 			demph_reg_value = 0x2B405555;  in vlv_set_signal_levels()
798 			uniqtranscale_reg_value = 0x552AB83A;  in vlv_set_signal_levels()
801 			demph_reg_value = 0x2B404040;  in vlv_set_signal_levels()
802 			uniqtranscale_reg_value = 0x5548B83A;  in vlv_set_signal_levels()
805 			demph_reg_value = 0x2B245555;  in vlv_set_signal_levels()
806 			uniqtranscale_reg_value = 0x5560B83A;  in vlv_set_signal_levels()
809 			demph_reg_value = 0x2B405555;  in vlv_set_signal_levels()
810 			uniqtranscale_reg_value = 0x5598DA3A;  in vlv_set_signal_levels()
817 		preemph_reg_value = 0x0002000;  in vlv_set_signal_levels()
820 			demph_reg_value = 0x2B404040;  in vlv_set_signal_levels()
821 			uniqtranscale_reg_value = 0x5552B83A;  in vlv_set_signal_levels()
824 			demph_reg_value = 0x2B404848;  in vlv_set_signal_levels()
825 			uniqtranscale_reg_value = 0x5580B83A;  in vlv_set_signal_levels()
828 			demph_reg_value = 0x2B404040;  in vlv_set_signal_levels()
829 			uniqtranscale_reg_value = 0x55ADDA3A;  in vlv_set_signal_levels()
836 		preemph_reg_value = 0x0000000;  in vlv_set_signal_levels()
839 			demph_reg_value = 0x2B305555;  in vlv_set_signal_levels()
840 			uniqtranscale_reg_value = 0x5570B83A;  in vlv_set_signal_levels()
843 			demph_reg_value = 0x2B2B4040;  in vlv_set_signal_levels()
844 			uniqtranscale_reg_value = 0x55ADDA3A;  in vlv_set_signal_levels()
851 		preemph_reg_value = 0x0006000;  in vlv_set_signal_levels()
854 			demph_reg_value = 0x1B405555;  in vlv_set_signal_levels()
855 			uniqtranscale_reg_value = 0x55ADDA3A;  in vlv_set_signal_levels()
867 				 uniqtranscale_reg_value, 0);  in vlv_set_signal_levels()
876 	u8 train_set = intel_dp->train_set[0];  in chv_set_signal_levels()
955 	u32 signal_levels = 0;  in g4x_signal_levels()
996 	u8 train_set = intel_dp->train_set[0];  in g4x_set_signal_levels()
1044 	u8 train_set = intel_dp->train_set[0];  in snb_cpu_edp_set_signal_levels()
1096 	u8 train_set = intel_dp->train_set[0];  in ivb_cpu_edp_set_signal_levels()
1141 	drm_modeset_acquire_init(&ctx, 0);  in intel_dp_hotplug()
1368 		intel_encoder->pipe_mask = ~0;  in g4x_dp_init()
1370 	intel_encoder->cloneable = 0;  in g4x_dp_init()