Lines Matching +full:0 +full:x1d
60 #define DRIVER_PATCHLEVEL 0
139 #define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
142 #define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
144 #define I810_VERBOSE 0
157 } while (0)
164 } while (0)
172 } while (0)
174 #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
175 #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
177 #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1)
178 #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
180 #define INST_PARSER_CLIENT 0x00000000
181 #define INST_OP_FLUSH 0x02000000
182 #define INST_FLUSH_MAP_CACHE 0x00000001
184 #define BB1_START_ADDR_MASK (~0x7)
185 #define BB1_PROTECTED (1<<0)
186 #define BB1_UNPROTECTED (0<<0)
187 #define BB2_END_ADDR_MASK (~0x7)
189 #define I810REG_HWSTAM 0x02098
190 #define I810REG_INT_IDENTITY_R 0x020a4
191 #define I810REG_INT_MASK_R 0x020a8
192 #define I810REG_INT_ENABLE_R 0x020a0
194 #define LP_RING 0x2030
195 #define HP_RING 0x2040
196 #define RING_TAIL 0x00
197 #define TAIL_ADDR 0x000FFFF8
198 #define RING_HEAD 0x04
199 #define HEAD_WRAP_COUNT 0xFFE00000
200 #define HEAD_WRAP_ONE 0x00200000
201 #define HEAD_ADDR 0x001FFFFC
202 #define RING_START 0x08
203 #define START_ADDR 0x00FFFFF8
204 #define RING_LEN 0x0C
205 #define RING_NR_PAGES 0x000FF000
206 #define RING_REPORT_MASK 0x00000006
207 #define RING_REPORT_64K 0x00000002
208 #define RING_REPORT_128K 0x00000004
209 #define RING_NO_REPORT 0x00000000
210 #define RING_VALID_MASK 0x00000001
211 #define RING_VALID 0x00000001
212 #define RING_INVALID 0x00000000
214 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
215 #define SC_UPDATE_SCISSOR (0x1<<1)
216 #define SC_ENABLE_MASK (0x1<<0)
217 #define SC_ENABLE (0x1<<0)
219 #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
220 #define SCI_YMIN_MASK (0xffff<<16)
221 #define SCI_XMIN_MASK (0xffff<<0)
222 #define SCI_YMAX_MASK (0xffff<<16)
223 #define SCI_XMAX_MASK (0xffff<<0)
225 #define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
226 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
227 #define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
228 #define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
229 #define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
230 #define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))
232 #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
233 #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
234 #define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23))
235 #define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23))
237 #define BR00_BITBLT_CLIENT 0x40000000
238 #define BR00_OP_COLOR_BLT 0x10000000
239 #define BR00_OP_SRC_COPY_BLT 0x10C00000
240 #define BR13_SOLID_PATTERN 0x80000000