Lines Matching refs:DPLL_CTRL
77 #define DPLL_CTRL 0x6000 macro
293 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
295 REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_mode_set()
309 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
312 REG_WRITE(DPLL_CTRL, 0x00000008); in oaktrail_crtc_hdmi_mode_set()
315 REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); in oaktrail_crtc_hdmi_mode_set()
420 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
422 REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
434 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
436 REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
745 hdmi_dev->saveDPLL_CTRL = PSB_RVDC32(DPLL_CTRL); in oaktrail_hdmi_save()
798 PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL); in oaktrail_hdmi_restore()