Lines Matching refs:MXR_CFG
234 DUMPREG(MXR_CFG); in mixer_regs_dump()
360 return !(mixer_reg_read(ctx, MXR_CFG) & in mixer_is_synced()
367 base = mixer_reg_read(ctx, MXR_CFG); in mixer_is_synced()
406 mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE); in mixer_enable_sync()
426 mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_SCAN_MASK); in mixer_cfg_scan()
454 mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_RGB_FMT_MASK); in mixer_cfg_rgb_fmt()
464 mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_GRP0_ENABLE); in mixer_cfg_layer()
470 mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_GRP1_ENABLE); in mixer_cfg_layer()
479 mixer_reg_writemask(ctx, MXR_CFG, val, in mixer_cfg_layer()
708 mixer_reg_writemask(ctx, MXR_CFG, MXR_CFG_DST_HDMI, MXR_CFG_DST_MASK); in mixer_win_reset()
711 mixer_reg_writemask(ctx, MXR_CFG, MXR_CFG_OUT_RGB888, MXR_CFG_OUT_MASK); in mixer_win_reset()
732 mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_GRP0_ENABLE); in mixer_win_reset()
733 mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_GRP1_ENABLE); in mixer_win_reset()
735 mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_VP_ENABLE); in mixer_win_reset()