Lines Matching +full:display +full:- +full:width +full:- +full:chars
3 * Copyright (c) 2007-2008 Intel Corporation
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
78 /* Force reduced-blanking timings for detailed modes */
88 /* Non desktop display (i.e. HMD) */
125 /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
131 /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
141 /* Envision Peripherals, Inc. EN-7100e */
153 /* LG Philips LCD LP154W01-A5 */
159 /* Samsung SyncMaster 22[5-6]BW */
163 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
175 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
178 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
233 /* 0x01 - 640x350@85Hz */
237 /* 0x02 - 640x400@85Hz */
241 /* 0x03 - 720x400@85Hz */
245 /* 0x04 - 640x480@60Hz */
249 /* 0x05 - 640x480@72Hz */
253 /* 0x06 - 640x480@75Hz */
257 /* 0x07 - 640x480@85Hz */
261 /* 0x08 - 800x600@56Hz */
265 /* 0x09 - 800x600@60Hz */
269 /* 0x0a - 800x600@72Hz */
273 /* 0x0b - 800x600@75Hz */
277 /* 0x0c - 800x600@85Hz */
281 /* 0x0d - 800x600@120Hz RB */
285 /* 0x0e - 848x480@60Hz */
289 /* 0x0f - 1024x768@43Hz, interlace */
294 /* 0x10 - 1024x768@60Hz */
298 /* 0x11 - 1024x768@70Hz */
302 /* 0x12 - 1024x768@75Hz */
306 /* 0x13 - 1024x768@85Hz */
310 /* 0x14 - 1024x768@120Hz RB */
314 /* 0x15 - 1152x864@75Hz */
318 /* 0x55 - 1280x720@60Hz */
322 /* 0x16 - 1280x768@60Hz RB */
326 /* 0x17 - 1280x768@60Hz */
330 /* 0x18 - 1280x768@75Hz */
334 /* 0x19 - 1280x768@85Hz */
338 /* 0x1a - 1280x768@120Hz RB */
342 /* 0x1b - 1280x800@60Hz RB */
346 /* 0x1c - 1280x800@60Hz */
350 /* 0x1d - 1280x800@75Hz */
354 /* 0x1e - 1280x800@85Hz */
358 /* 0x1f - 1280x800@120Hz RB */
362 /* 0x20 - 1280x960@60Hz */
366 /* 0x21 - 1280x960@85Hz */
370 /* 0x22 - 1280x960@120Hz RB */
374 /* 0x23 - 1280x1024@60Hz */
378 /* 0x24 - 1280x1024@75Hz */
382 /* 0x25 - 1280x1024@85Hz */
386 /* 0x26 - 1280x1024@120Hz RB */
390 /* 0x27 - 1360x768@60Hz */
394 /* 0x28 - 1360x768@120Hz RB */
398 /* 0x51 - 1366x768@60Hz */
402 /* 0x56 - 1366x768@60Hz */
406 /* 0x29 - 1400x1050@60Hz RB */
410 /* 0x2a - 1400x1050@60Hz */
414 /* 0x2b - 1400x1050@75Hz */
418 /* 0x2c - 1400x1050@85Hz */
422 /* 0x2d - 1400x1050@120Hz RB */
426 /* 0x2e - 1440x900@60Hz RB */
430 /* 0x2f - 1440x900@60Hz */
434 /* 0x30 - 1440x900@75Hz */
438 /* 0x31 - 1440x900@85Hz */
442 /* 0x32 - 1440x900@120Hz RB */
446 /* 0x53 - 1600x900@60Hz */
450 /* 0x33 - 1600x1200@60Hz */
454 /* 0x34 - 1600x1200@65Hz */
458 /* 0x35 - 1600x1200@70Hz */
462 /* 0x36 - 1600x1200@75Hz */
466 /* 0x37 - 1600x1200@85Hz */
470 /* 0x38 - 1600x1200@120Hz RB */
474 /* 0x39 - 1680x1050@60Hz RB */
478 /* 0x3a - 1680x1050@60Hz */
482 /* 0x3b - 1680x1050@75Hz */
486 /* 0x3c - 1680x1050@85Hz */
490 /* 0x3d - 1680x1050@120Hz RB */
494 /* 0x3e - 1792x1344@60Hz */
498 /* 0x3f - 1792x1344@75Hz */
502 /* 0x40 - 1792x1344@120Hz RB */
506 /* 0x41 - 1856x1392@60Hz */
510 /* 0x42 - 1856x1392@75Hz */
514 /* 0x43 - 1856x1392@120Hz RB */
518 /* 0x52 - 1920x1080@60Hz */
522 /* 0x44 - 1920x1200@60Hz RB */
526 /* 0x45 - 1920x1200@60Hz */
530 /* 0x46 - 1920x1200@75Hz */
534 /* 0x47 - 1920x1200@85Hz */
538 /* 0x48 - 1920x1200@120Hz RB */
542 /* 0x49 - 1920x1440@60Hz */
546 /* 0x4a - 1920x1440@75Hz */
550 /* 0x4b - 1920x1440@120Hz RB */
554 /* 0x54 - 2048x1152@60Hz */
558 /* 0x4c - 2560x1600@60Hz RB */
562 /* 0x4d - 2560x1600@60Hz */
566 /* 0x4e - 2560x1600@75Hz */
570 /* 0x4f - 2560x1600@85Hz */
574 /* 0x50 - 2560x1600@120Hz RB */
578 /* 0x57 - 4096x2160@60Hz RB */
582 /* 0x58 - 4096x2160@59.94Hz RB */
591 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
595 * The DMT modes have been fact-checked; the rest are mild guesses.
722 * From CEA/CTA-861 spec.
727 /* 1 - 640x480@60Hz 4:3 */
732 /* 2 - 720x480@60Hz 4:3 */
737 /* 3 - 720x480@60Hz 16:9 */
742 /* 4 - 1280x720@60Hz 16:9 */
747 /* 5 - 1920x1080i@60Hz 16:9 */
753 /* 6 - 720(1440)x480i@60Hz 4:3 */
759 /* 7 - 720(1440)x480i@60Hz 16:9 */
765 /* 8 - 720(1440)x240@60Hz 4:3 */
771 /* 9 - 720(1440)x240@60Hz 16:9 */
777 /* 10 - 2880x480i@60Hz 4:3 */
783 /* 11 - 2880x480i@60Hz 16:9 */
789 /* 12 - 2880x240@60Hz 4:3 */
794 /* 13 - 2880x240@60Hz 16:9 */
799 /* 14 - 1440x480@60Hz 4:3 */
804 /* 15 - 1440x480@60Hz 16:9 */
809 /* 16 - 1920x1080@60Hz 16:9 */
814 /* 17 - 720x576@50Hz 4:3 */
819 /* 18 - 720x576@50Hz 16:9 */
824 /* 19 - 1280x720@50Hz 16:9 */
829 /* 20 - 1920x1080i@50Hz 16:9 */
835 /* 21 - 720(1440)x576i@50Hz 4:3 */
841 /* 22 - 720(1440)x576i@50Hz 16:9 */
847 /* 23 - 720(1440)x288@50Hz 4:3 */
853 /* 24 - 720(1440)x288@50Hz 16:9 */
859 /* 25 - 2880x576i@50Hz 4:3 */
865 /* 26 - 2880x576i@50Hz 16:9 */
871 /* 27 - 2880x288@50Hz 4:3 */
876 /* 28 - 2880x288@50Hz 16:9 */
881 /* 29 - 1440x576@50Hz 4:3 */
886 /* 30 - 1440x576@50Hz 16:9 */
891 /* 31 - 1920x1080@50Hz 16:9 */
896 /* 32 - 1920x1080@24Hz 16:9 */
901 /* 33 - 1920x1080@25Hz 16:9 */
906 /* 34 - 1920x1080@30Hz 16:9 */
911 /* 35 - 2880x480@60Hz 4:3 */
916 /* 36 - 2880x480@60Hz 16:9 */
921 /* 37 - 2880x576@50Hz 4:3 */
926 /* 38 - 2880x576@50Hz 16:9 */
931 /* 39 - 1920x1080i@50Hz 16:9 */
937 /* 40 - 1920x1080i@100Hz 16:9 */
943 /* 41 - 1280x720@100Hz 16:9 */
948 /* 42 - 720x576@100Hz 4:3 */
953 /* 43 - 720x576@100Hz 16:9 */
958 /* 44 - 720(1440)x576i@100Hz 4:3 */
964 /* 45 - 720(1440)x576i@100Hz 16:9 */
970 /* 46 - 1920x1080i@120Hz 16:9 */
976 /* 47 - 1280x720@120Hz 16:9 */
981 /* 48 - 720x480@120Hz 4:3 */
986 /* 49 - 720x480@120Hz 16:9 */
991 /* 50 - 720(1440)x480i@120Hz 4:3 */
997 /* 51 - 720(1440)x480i@120Hz 16:9 */
1003 /* 52 - 720x576@200Hz 4:3 */
1008 /* 53 - 720x576@200Hz 16:9 */
1013 /* 54 - 720(1440)x576i@200Hz 4:3 */
1019 /* 55 - 720(1440)x576i@200Hz 16:9 */
1025 /* 56 - 720x480@240Hz 4:3 */
1030 /* 57 - 720x480@240Hz 16:9 */
1035 /* 58 - 720(1440)x480i@240Hz 4:3 */
1041 /* 59 - 720(1440)x480i@240Hz 16:9 */
1047 /* 60 - 1280x720@24Hz 16:9 */
1052 /* 61 - 1280x720@25Hz 16:9 */
1057 /* 62 - 1280x720@30Hz 16:9 */
1062 /* 63 - 1920x1080@120Hz 16:9 */
1067 /* 64 - 1920x1080@100Hz 16:9 */
1072 /* 65 - 1280x720@24Hz 64:27 */
1077 /* 66 - 1280x720@25Hz 64:27 */
1082 /* 67 - 1280x720@30Hz 64:27 */
1087 /* 68 - 1280x720@50Hz 64:27 */
1092 /* 69 - 1280x720@60Hz 64:27 */
1097 /* 70 - 1280x720@100Hz 64:27 */
1102 /* 71 - 1280x720@120Hz 64:27 */
1107 /* 72 - 1920x1080@24Hz 64:27 */
1112 /* 73 - 1920x1080@25Hz 64:27 */
1117 /* 74 - 1920x1080@30Hz 64:27 */
1122 /* 75 - 1920x1080@50Hz 64:27 */
1127 /* 76 - 1920x1080@60Hz 64:27 */
1132 /* 77 - 1920x1080@100Hz 64:27 */
1137 /* 78 - 1920x1080@120Hz 64:27 */
1142 /* 79 - 1680x720@24Hz 64:27 */
1147 /* 80 - 1680x720@25Hz 64:27 */
1152 /* 81 - 1680x720@30Hz 64:27 */
1157 /* 82 - 1680x720@50Hz 64:27 */
1162 /* 83 - 1680x720@60Hz 64:27 */
1167 /* 84 - 1680x720@100Hz 64:27 */
1172 /* 85 - 1680x720@120Hz 64:27 */
1177 /* 86 - 2560x1080@24Hz 64:27 */
1182 /* 87 - 2560x1080@25Hz 64:27 */
1187 /* 88 - 2560x1080@30Hz 64:27 */
1192 /* 89 - 2560x1080@50Hz 64:27 */
1197 /* 90 - 2560x1080@60Hz 64:27 */
1202 /* 91 - 2560x1080@100Hz 64:27 */
1207 /* 92 - 2560x1080@120Hz 64:27 */
1212 /* 93 - 3840x2160@24Hz 16:9 */
1217 /* 94 - 3840x2160@25Hz 16:9 */
1222 /* 95 - 3840x2160@30Hz 16:9 */
1227 /* 96 - 3840x2160@50Hz 16:9 */
1232 /* 97 - 3840x2160@60Hz 16:9 */
1237 /* 98 - 4096x2160@24Hz 256:135 */
1242 /* 99 - 4096x2160@25Hz 256:135 */
1247 /* 100 - 4096x2160@30Hz 256:135 */
1252 /* 101 - 4096x2160@50Hz 256:135 */
1257 /* 102 - 4096x2160@60Hz 256:135 */
1262 /* 103 - 3840x2160@24Hz 64:27 */
1267 /* 104 - 3840x2160@25Hz 64:27 */
1272 /* 105 - 3840x2160@30Hz 64:27 */
1277 /* 106 - 3840x2160@50Hz 64:27 */
1282 /* 107 - 3840x2160@60Hz 64:27 */
1287 /* 108 - 1280x720@48Hz 16:9 */
1292 /* 109 - 1280x720@48Hz 64:27 */
1297 /* 110 - 1680x720@48Hz 64:27 */
1302 /* 111 - 1920x1080@48Hz 16:9 */
1307 /* 112 - 1920x1080@48Hz 64:27 */
1312 /* 113 - 2560x1080@48Hz 64:27 */
1317 /* 114 - 3840x2160@48Hz 16:9 */
1322 /* 115 - 4096x2160@48Hz 256:135 */
1327 /* 116 - 3840x2160@48Hz 64:27 */
1332 /* 117 - 3840x2160@100Hz 16:9 */
1337 /* 118 - 3840x2160@120Hz 16:9 */
1342 /* 119 - 3840x2160@100Hz 64:27 */
1347 /* 120 - 3840x2160@120Hz 64:27 */
1352 /* 121 - 5120x2160@24Hz 64:27 */
1357 /* 122 - 5120x2160@25Hz 64:27 */
1362 /* 123 - 5120x2160@30Hz 64:27 */
1367 /* 124 - 5120x2160@48Hz 64:27 */
1372 /* 125 - 5120x2160@50Hz 64:27 */
1377 /* 126 - 5120x2160@60Hz 64:27 */
1382 /* 127 - 5120x2160@100Hz 64:27 */
1390 * From CEA/CTA-861 spec.
1395 /* 193 - 5120x2160@120Hz 64:27 */
1400 /* 194 - 7680x4320@24Hz 16:9 */
1405 /* 195 - 7680x4320@25Hz 16:9 */
1410 /* 196 - 7680x4320@30Hz 16:9 */
1415 /* 197 - 7680x4320@48Hz 16:9 */
1420 /* 198 - 7680x4320@50Hz 16:9 */
1425 /* 199 - 7680x4320@60Hz 16:9 */
1430 /* 200 - 7680x4320@100Hz 16:9 */
1435 /* 201 - 7680x4320@120Hz 16:9 */
1440 /* 202 - 7680x4320@24Hz 64:27 */
1445 /* 203 - 7680x4320@25Hz 64:27 */
1450 /* 204 - 7680x4320@30Hz 64:27 */
1455 /* 205 - 7680x4320@48Hz 64:27 */
1460 /* 206 - 7680x4320@50Hz 64:27 */
1465 /* 207 - 7680x4320@60Hz 64:27 */
1470 /* 208 - 7680x4320@100Hz 64:27 */
1475 /* 209 - 7680x4320@120Hz 64:27 */
1480 /* 210 - 10240x4320@24Hz 64:27 */
1485 /* 211 - 10240x4320@25Hz 64:27 */
1490 /* 212 - 10240x4320@30Hz 64:27 */
1495 /* 213 - 10240x4320@48Hz 64:27 */
1500 /* 214 - 10240x4320@50Hz 64:27 */
1505 /* 215 - 10240x4320@60Hz 64:27 */
1510 /* 216 - 10240x4320@100Hz 64:27 */
1515 /* 217 - 10240x4320@120Hz 64:27 */
1520 /* 218 - 4096x2160@100Hz 256:135 */
1525 /* 219 - 4096x2160@120Hz 256:135 */
1536 /* 0 - dummy, VICs start at 1 */
1538 /* 1 - 3840x2160@30Hz */
1544 /* 2 - 3840x2160@25Hz */
1550 /* 3 - 3840x2160@24Hz */
1556 /* 4 - 4096x2160@24Hz (SMPTE) */
1578 const struct edid *edid = drm_edid->edid; in version_greater()
1580 return edid->version > version || in version_greater()
1581 (edid->version == version && edid->revision > revision); in version_greater()
1595 return edid->extensions; in edid_extension_block_count()
1630 num_blocks = edid_block_count(drm_edid->edid); in drm_edid_block_count()
1632 /* HF-EEODB override */ in drm_edid_block_count()
1633 if (drm_edid->size >= edid_size_by_blocks(2)) { in drm_edid_block_count()
1637 * Note: HF-EEODB may specify a smaller extension count than the in drm_edid_block_count()
1640 eeodb = edid_hfeeodb_block_count(drm_edid->edid); in drm_edid_block_count()
1646 num_blocks = min(num_blocks, (int)drm_edid->size / EDID_LENGTH); in drm_edid_block_count()
1653 return drm_edid_block_count(drm_edid) - 1; in drm_edid_extension_block_count()
1658 return edid_block_data(drm_edid->edid, index); in drm_edid_block_data()
1664 return edid_extension_block_data(drm_edid->edid, index); in drm_edid_extension_block_data()
1679 drm_edid->edid = edid; in drm_edid_legacy_init()
1680 drm_edid->size = edid_size(edid); in drm_edid_legacy_init()
1709 iter->drm_edid = drm_edid; in drm_edid_iter_begin()
1716 if (!iter->drm_edid) in __drm_edid_iter_next()
1719 if (iter->index < drm_edid_block_count(iter->drm_edid)) in __drm_edid_iter_next()
1720 block = drm_edid_block_data(iter->drm_edid, iter->index++); in __drm_edid_iter_next()
1743 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1756 if (edid->header[i] == edid_header[i]) in drm_edid_header_is_valid()
1767 "Minimum number of valid EDID header bytes (0-8, default 6)");
1775 for (i = 0; i < EDID_LENGTH - 1; i++) in edid_block_compute_checksum()
1778 crc = 0x100 - csum; in edid_block_compute_checksum()
1787 return block->checksum; in edid_block_get_checksum()
1803 * drm_edid_are_equal - compare two edid blobs.
1875 if (block->version != 1) in edid_block_check()
1933 block->version); in edid_block_status_print()
1960 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
2020 * drm_edid_is_valid - sanity check EDID data
2023 * Sanity-check an entire EDID record (including extensions)
2052 * Note: If the EDID uses HF-EEODB, but has invalid blocks, we'll revert in edid_filter_invalid_blocks()
2054 * modifying the HF-EEODB extension too. in edid_filter_invalid_blocks()
2073 edid->extensions = valid_blocks - 1; in edid_filter_invalid_blocks()
2074 edid->checksum = edid_block_compute_checksum(edid); in edid_filter_invalid_blocks()
2087 * drm_do_probe_ddc_edid() - get EDID information via I2C
2095 * Return: 0 on success or -1 on failure.
2108 * adapter reports EAGAIN. However, we find that bit-banging transfers in drm_do_probe_ddc_edid()
2134 * Avoid sending the segment addr to not upset non-compliant in drm_do_probe_ddc_edid()
2137 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); in drm_do_probe_ddc_edid()
2139 if (ret == -ENXIO) { in drm_do_probe_ddc_edid()
2140 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", in drm_do_probe_ddc_edid()
2141 adapter->name); in drm_do_probe_ddc_edid()
2144 } while (ret != xfers && --retries); in drm_do_probe_ddc_edid()
2146 return ret == xfers ? 0 : -1; in drm_do_probe_ddc_edid()
2161 last_block = edid->extensions; in connector_bad_edid()
2165 connector->real_edid_checksum = in connector_bad_edid()
2168 if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS)) in connector_bad_edid()
2171 drm_dbg_kms(connector->dev, "%s: EDID is invalid:\n", connector->name); in connector_bad_edid()
2182 if (connector->override_edid) in drm_get_override_edid()
2183 override = drm_edid_duplicate(connector->edid_blob_ptr->data); in drm_get_override_edid()
2202 return -EINVAL; in drm_edid_override_set()
2204 connector->override_edid = false; in drm_edid_override_set()
2208 connector->override_edid = true; in drm_edid_override_set()
2216 connector->override_edid = false; in drm_edid_override_reset()
2222 * drm_add_override_edid_modes - add modes from override/firmware EDID
2244 connector->base.id, connector->name, num_modes); in drm_add_override_edid_modes()
2312 connector->edid_corrupt = false; in _drm_do_get_edid()
2314 connector->edid_corrupt = true; in _drm_do_get_edid()
2318 connector->null_edid_counter++; in _drm_do_get_edid()
2348 * the first Data Block is HF-EEODB, override the in _drm_do_get_edid()
2351 * Note: HF-EEODB could specify a smaller extension in _drm_do_get_edid()
2386 * drm_do_get_edid - get EDID data using a custom EDID block read function
2414 * drm_edid_raw - Get a pointer to the raw EDID data.
2425 if (!drm_edid || !drm_edid->size) in drm_edid_raw()
2432 if (WARN_ON(edid_size(drm_edid->edid) > drm_edid->size)) in drm_edid_raw()
2435 return drm_edid->edid; in drm_edid_raw()
2449 drm_edid->edid = edid; in _drm_edid_alloc()
2450 drm_edid->size = size; in _drm_edid_alloc()
2457 * drm_edid_alloc - Allocate a new drm_edid container
2490 * drm_edid_dup - Duplicate a drm_edid container
2502 return drm_edid_alloc(drm_edid->edid, drm_edid->size); in drm_edid_dup()
2507 * drm_edid_free - Free the drm_edid container
2515 kfree(drm_edid->edid); in drm_edid_free()
2521 * drm_probe_ddc() - probe DDC presence
2536 * drm_get_edid - get EDID data, if available
2550 if (connector->force == DRM_FORCE_OFF) in drm_get_edid()
2553 if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) in drm_get_edid()
2563 * drm_edid_read_custom - Read EDID data using given EDID block read function
2598 drm_WARN_ON(connector->dev, !size); in drm_edid_read_custom()
2609 * drm_edid_read_ddc - Read EDID data using given I2C adapter
2619 * Prefer initializing connector->ddc with drm_connector_init_with_ddc() and
2631 if (connector->force == DRM_FORCE_OFF) in drm_edid_read_ddc()
2634 if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) in drm_edid_read_ddc()
2646 * drm_edid_read - Read EDID data using connector's I2C adapter
2661 if (drm_WARN_ON(connector->dev, !connector->ddc)) in drm_edid_read()
2664 return drm_edid_read_ddc(connector, connector->ddc); in drm_edid_read()
2671 * We represent the ID as a 32-bit number so it can easily be compared in edid_extract_panel_id()
2683 return (u32)edid->mfg_id[0] << 24 | in edid_extract_panel_id()
2684 (u32)edid->mfg_id[1] << 16 | in edid_extract_panel_id()
2689 * drm_edid_get_panel_id - Get a panel's ID through DDC
2693 * that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value
2694 * (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's
2706 * Return: A 32-bit ID that should be different for each make/model of panel.
2741 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
2754 struct drm_device *dev = connector->dev; in drm_get_edid_switcheroo()
2755 struct pci_dev *pdev = to_pci_dev(dev->dev); in drm_get_edid_switcheroo()
2758 if (drm_WARN_ON_ONCE(dev, !dev_is_pci(dev->dev))) in drm_get_edid_switcheroo()
2770 * drm_edid_duplicate - duplicate an EDID and the extensions
2784 * edid_get_quirks - return quirk flags for a given EDID
2791 u32 panel_id = edid_extract_panel_id(drm_edid->edid); in edid_get_quirks()
2797 if (quirk->panel_id == panel_id) in edid_get_quirks()
2798 return quirk->quirks; in edid_get_quirks()
2804 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
2805 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
2818 if (list_empty(&connector->probed_modes)) in edid_fixup_preferred()
2826 preferred_mode = list_first_entry(&connector->probed_modes, in edid_fixup_preferred()
2829 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { in edid_fixup_preferred()
2830 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2849 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2855 return (mode->htotal - mode->hdisplay == 160) && in mode_is_rb()
2856 (mode->hsync_end - mode->hdisplay == 80) && in mode_is_rb()
2857 (mode->hsync_end - mode->hsync_start == 32) && in mode_is_rb()
2858 (mode->vsync_start - mode->vdisplay == 3); in mode_is_rb()
2862 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
2864 * @hsize: Mode width
2867 * @rb: Mode reduced-blanking-ness
2882 if (hsize != ptr->hdisplay) in drm_mode_find_dmt()
2884 if (vsize != ptr->vdisplay) in drm_mode_find_dmt()
2904 return descriptor->pixel_clock == 0 && in is_display_descriptor()
2905 descriptor->data.other_data.pad1 == 0 && in is_display_descriptor()
2906 descriptor->data.other_data.type == type; in is_display_descriptor()
2913 return descriptor->pixel_clock != 0; in is_detailed_timing_descriptor()
2928 n = (127 - d) / 18; in cea_for_each_detailed_block()
2957 cb(&drm_edid->edid->detailed_timings[i], closure); in drm_for_each_detailed_block()
2986 if (descriptor->data.other_data.data.range.flags == DRM_EDID_CVT_SUPPORT_FLAG && in is_rb()
2987 descriptor->data.other_data.data.range.formula.cvt.flags & 0x10) in is_rb()
2995 if (drm_edid->edid->revision >= 4) { in drm_monitor_supports_rb()
3002 return ((drm_edid->edid->input & DRM_EDID_INPUT_DIGITAL) != 0); in drm_monitor_supports_rb()
3015 if (descriptor->data.other_data.data.range.flags == 0x02) in find_gtf2()
3029 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.hfreq_start_khz * 2 : 0; in drm_gtf2_hbreak()
3041 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.c : 0; in drm_gtf2_2c()
3053 return descriptor ? le16_to_cpu(descriptor->data.other_data.data.range.formula.gtf2.m) : 0; in drm_gtf2_m()
3065 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.k : 0; in drm_gtf2_k()
3077 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.j : 0; in drm_gtf2_2j()
3083 const struct edid *edid = drm_edid->edid; in standard_timing_level()
3085 if (edid->revision >= 2) { in standard_timing_level()
3086 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) in standard_timing_level()
3090 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) in standard_timing_level()
3110 if (mode->htotal <= 0) in drm_mode_hsync()
3113 return DIV_ROUND_CLOSEST(mode->clock, mode->htotal); in drm_mode_hsync()
3117 * Take the standard timing params (in this case width, aspect, and refresh)
3124 struct drm_device *dev = connector->dev; in drm_mode_std()
3128 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) in drm_mode_std()
3130 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) in drm_mode_std()
3134 if (bad_std_timing(t->hsize, t->vfreq_aspect)) in drm_mode_std()
3138 hsize = t->hsize * 8 + 248; in drm_mode_std()
3143 if (drm_edid->edid->revision < 3) in drm_mode_std()
3168 list_for_each_entry(m, &connector->probed_modes, head) in drm_mode_std()
3169 if (m->hdisplay == hsize && m->vdisplay == vsize && in drm_mode_std()
3179 mode->hdisplay = 1366; in drm_mode_std()
3180 mode->hsync_start = mode->hsync_start - 1; in drm_mode_std()
3181 mode->hsync_end = mode->hsync_end - 1; in drm_mode_std()
3255 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) in drm_mode_do_interlace_quirk()
3259 if ((mode->hdisplay == cea_interlaced[i].w) && in drm_mode_do_interlace_quirk()
3260 (mode->vdisplay == cea_interlaced[i].h / 2)) { in drm_mode_do_interlace_quirk()
3261 mode->vdisplay *= 2; in drm_mode_do_interlace_quirk()
3262 mode->vsync_start *= 2; in drm_mode_do_interlace_quirk()
3263 mode->vsync_end *= 2; in drm_mode_do_interlace_quirk()
3264 mode->vtotal *= 2; in drm_mode_do_interlace_quirk()
3265 mode->vtotal |= 1; in drm_mode_do_interlace_quirk()
3269 mode->flags |= DRM_MODE_FLAG_INTERLACE; in drm_mode_do_interlace_quirk()
3283 const struct detailed_pixel_timing *pt = &timing->data.pixel_data; in drm_mode_detailed()
3284 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; in drm_mode_detailed()
3285 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; in drm_mode_detailed()
3286 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; in drm_mode_detailed()
3287 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; in drm_mode_detailed()
3288 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; in drm_mode_detailed()
3289 …unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse… in drm_mode_detailed()
3290 …unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_puls… in drm_mode_detailed()
3291 …unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offse… in drm_mode_detailed()
3297 if (pt->misc & DRM_EDID_PT_STEREO) { in drm_mode_detailed()
3301 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { in drm_mode_detailed()
3305 /* it is incorrect if hsync/vsync width is zero */ in drm_mode_detailed()
3308 "Wrong Hsync/Vsync pulse width\n"); in drm_mode_detailed()
3325 mode->clock = 1088 * 10; in drm_mode_detailed()
3327 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; in drm_mode_detailed()
3329 mode->hdisplay = hactive; in drm_mode_detailed()
3330 mode->hsync_start = mode->hdisplay + hsync_offset; in drm_mode_detailed()
3331 mode->hsync_end = mode->hsync_start + hsync_pulse_width; in drm_mode_detailed()
3332 mode->htotal = mode->hdisplay + hblank; in drm_mode_detailed()
3334 mode->vdisplay = vactive; in drm_mode_detailed()
3335 mode->vsync_start = mode->vdisplay + vsync_offset; in drm_mode_detailed()
3336 mode->vsync_end = mode->vsync_start + vsync_pulse_width; in drm_mode_detailed()
3337 mode->vtotal = mode->vdisplay + vblank; in drm_mode_detailed()
3340 if (mode->hsync_end > mode->htotal) in drm_mode_detailed()
3341 mode->htotal = mode->hsync_end + 1; in drm_mode_detailed()
3342 if (mode->vsync_end > mode->vtotal) in drm_mode_detailed()
3343 mode->vtotal = mode->vsync_end + 1; in drm_mode_detailed()
3348 mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; in drm_mode_detailed()
3350 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? in drm_mode_detailed()
3352 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? in drm_mode_detailed()
3357 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; in drm_mode_detailed()
3358 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; in drm_mode_detailed()
3361 mode->width_mm *= 10; in drm_mode_detailed()
3362 mode->height_mm *= 10; in drm_mode_detailed()
3366 mode->width_mm = drm_edid->edid->width_cm * 10; in drm_mode_detailed()
3367 mode->height_mm = drm_edid->edid->height_cm * 10; in drm_mode_detailed()
3370 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_detailed()
3383 if (edid->revision >= 4) in mode_in_hsync_range()
3386 if (edid->revision >= 4) in mode_in_hsync_range()
3400 if (edid->revision >= 4) in mode_in_vsync_range()
3403 if (edid->revision >= 4) in mode_in_vsync_range()
3418 if (edid->revision >= 4 && t[10] == 0x04) in range_pixel_clock()
3419 return (t[9] * 10000) - ((t[12] >> 2) * 250); in range_pixel_clock()
3429 const struct edid *edid = drm_edid->edid; in mode_in_range()
3440 if (mode->clock > max_clock) in mode_in_range()
3444 if (edid->revision >= 4 && t[10] == 0x04) in mode_in_range()
3445 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) in mode_in_range()
3460 list_for_each_entry(m, &connector->probed_modes, head) { in valid_inferred_mode()
3461 if (mode->hdisplay == m->hdisplay && in valid_inferred_mode()
3462 mode->vdisplay == m->vdisplay && in valid_inferred_mode()
3465 if (mode->hdisplay <= m->hdisplay && in valid_inferred_mode()
3466 mode->vdisplay <= m->vdisplay) in valid_inferred_mode()
3478 struct drm_device *dev = connector->dev; in drm_dmt_modes_for_range()
3495 * GFT/CVT can't express 1366 width which isn't dividable by 8
3499 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { in drm_mode_fixup_1366x768()
3500 mode->hdisplay = 1366; in drm_mode_fixup_1366x768()
3501 mode->hsync_start--; in drm_mode_fixup_1366x768()
3502 mode->hsync_end--; in drm_mode_fixup_1366x768()
3513 struct drm_device *dev = connector->dev; in drm_gtf_modes_for_range()
3518 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); in drm_gtf_modes_for_range()
3542 struct drm_device *dev = connector->dev; in drm_cvt_modes_for_range()
3548 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); in drm_cvt_modes_for_range()
3570 const struct detailed_non_pixel *data = &timing->data.other_data; in do_inferred_modes()
3571 const struct detailed_data_monitor_range *range = &data->data.range; in do_inferred_modes()
3576 closure->modes += drm_dmt_modes_for_range(closure->connector, in do_inferred_modes()
3577 closure->drm_edid, in do_inferred_modes()
3580 if (!version_greater(closure->drm_edid, 1, 1)) in do_inferred_modes()
3583 switch (range->flags) { in do_inferred_modes()
3586 closure->modes += drm_gtf_modes_for_range(closure->connector, in do_inferred_modes()
3587 closure->drm_edid, in do_inferred_modes()
3591 if (!version_greater(closure->drm_edid, 1, 3)) in do_inferred_modes()
3594 closure->modes += drm_cvt_modes_for_range(closure->connector, in do_inferred_modes()
3595 closure->drm_edid, in do_inferred_modes()
3626 for (j = 7; j >= 0; j--) { in drm_est3_modes()
3627 m = (i * 8) + (7 - j); in drm_est3_modes()
3631 mode = drm_mode_find_dmt(connector->dev, in drm_est3_modes()
3655 closure->modes += drm_est3_modes(closure->connector, timing); in do_established_modes()
3666 struct drm_device *dev = connector->dev; in add_established_modes()
3667 const struct edid *edid = drm_edid->edid; in add_established_modes()
3668 unsigned long est_bits = edid->established_timings.t1 | in add_established_modes()
3669 (edid->established_timings.t2 << 8) | in add_established_modes()
3670 ((edid->established_timings.mfg_rsvd & 0x80) << 9); in add_established_modes()
3700 const struct detailed_non_pixel *data = &timing->data.other_data; in do_standard_modes()
3701 struct drm_connector *connector = closure->connector; in do_standard_modes()
3708 const struct std_timing *std = &data->data.timings[i]; in do_standard_modes()
3711 newmode = drm_mode_std(connector, closure->drm_edid, std); in do_standard_modes()
3714 closure->modes++; in do_standard_modes()
3737 &drm_edid->edid->standard_timings[i]); in add_standard_modes()
3758 struct drm_device *dev = connector->dev; in drm_cvt_modes()
3764 int width, height; in drm_cvt_modes() local
3766 cvt = &(timing->data.other_data.data.cvt[i]); in drm_cvt_modes()
3768 if (!memcmp(cvt->code, empty, 3)) in drm_cvt_modes()
3771 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; in drm_cvt_modes()
3772 switch (cvt->code[1] & 0x0c) { in drm_cvt_modes()
3773 /* default - because compiler doesn't see that we've enumerated all cases */ in drm_cvt_modes()
3776 width = height * 4 / 3; in drm_cvt_modes()
3779 width = height * 16 / 9; in drm_cvt_modes()
3782 width = height * 16 / 10; in drm_cvt_modes()
3785 width = height * 15 / 9; in drm_cvt_modes()
3790 if (cvt->code[2] & (1 << j)) { in drm_cvt_modes()
3791 newmode = drm_cvt_mode(dev, width, height, in drm_cvt_modes()
3813 closure->modes += drm_cvt_modes(closure->connector, timing); in do_cvt_mode()
3843 newmode = drm_mode_detailed(closure->connector->dev, in do_detailed_mode()
3844 closure->drm_edid, timing, in do_detailed_mode()
3845 closure->quirks); in do_detailed_mode()
3849 if (closure->preferred) in do_detailed_mode()
3850 newmode->type |= DRM_MODE_TYPE_PREFERRED; in do_detailed_mode()
3859 drm_mode_probed_add(closure->connector, newmode); in do_detailed_mode()
3860 closure->modes++; in do_detailed_mode()
3861 closure->preferred = false; in do_detailed_mode()
3865 * add_detailed_modes - Add modes from detailed timings
3882 (drm_edid->edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); in add_detailed_modes()
3889 /* CTA-861-H Table 60 - CTA Tag Codes */
3896 /* CTA-861-H Table 62 - CTA Extended Tag Codes */
3955 if (block->tag == DATA_BLOCK_CTA) { in drm_edid_has_cta_extension()
3967 BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127); in cea_mode_for_vic()
3968 BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219); in cea_mode_for_vic()
3971 return &edid_cea_modes_1[vic - 1]; in cea_mode_for_vic()
3973 return &edid_cea_modes_193[vic - 193]; in cea_mode_for_vic()
3996 unsigned int clock = cea_mode->clock; in cea_mode_alternate_clock()
4006 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) in cea_mode_alternate_clock()
4026 BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || in cea_mode_alternate_timings()
4027 cea_mode_for_vic(9)->vtotal != 262 || in cea_mode_alternate_timings()
4028 cea_mode_for_vic(12)->vtotal != 262 || in cea_mode_alternate_timings()
4029 cea_mode_for_vic(13)->vtotal != 262 || in cea_mode_alternate_timings()
4030 cea_mode_for_vic(23)->vtotal != 312 || in cea_mode_alternate_timings()
4031 cea_mode_for_vic(24)->vtotal != 312 || in cea_mode_alternate_timings()
4032 cea_mode_for_vic(27)->vtotal != 312 || in cea_mode_alternate_timings()
4033 cea_mode_for_vic(28)->vtotal != 312); in cea_mode_alternate_timings()
4036 vic == 12 || vic == 13) && mode->vtotal < 263) || in cea_mode_alternate_timings()
4038 vic == 27 || vic == 28) && mode->vtotal < 314)) { in cea_mode_alternate_timings()
4039 mode->vsync_start++; in cea_mode_alternate_timings()
4040 mode->vsync_end++; in cea_mode_alternate_timings()
4041 mode->vtotal++; in cea_mode_alternate_timings()
4055 if (!to_match->clock) in drm_match_cea_mode_clock_tolerance()
4058 if (to_match->picture_aspect_ratio) in drm_match_cea_mode_clock_tolerance()
4071 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_cea_mode_clock_tolerance()
4072 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_cea_mode_clock_tolerance()
4085 * drm_match_cea_mode - look for a CEA mode matching given mode
4086 * @to_match: display mode
4088 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
4096 if (!to_match->clock) in drm_match_cea_mode()
4099 if (to_match->picture_aspect_ratio) in drm_match_cea_mode()
4112 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) && in drm_match_cea_mode()
4113 KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2)) in drm_match_cea_mode()
4136 return mode->picture_aspect_ratio; in drm_get_cea_aspect_ratio()
4162 if (!to_match->clock) in drm_match_hdmi_mode_clock_tolerance()
4165 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode_clock_tolerance()
4173 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode_clock_tolerance()
4176 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_hdmi_mode_clock_tolerance()
4177 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_hdmi_mode_clock_tolerance()
4188 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
4189 * @to_match: display mode
4200 if (!to_match->clock) in drm_match_hdmi_mode()
4203 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode()
4211 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode()
4214 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || in drm_match_hdmi_mode()
4215 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && in drm_match_hdmi_mode()
4230 struct drm_device *dev = connector->dev; in add_alternate_cea_modes()
4243 list_for_each_entry(mode, &connector->probed_modes, head) { in add_alternate_cea_modes()
4263 clock1 = cea_mode->clock; in add_alternate_cea_modes()
4268 if (mode->clock != clock1 && mode->clock != clock2) in add_alternate_cea_modes()
4276 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; in add_alternate_cea_modes()
4282 if (mode->clock != clock1) in add_alternate_cea_modes()
4283 newmode->clock = clock1; in add_alternate_cea_modes()
4285 newmode->clock = clock2; in add_alternate_cea_modes()
4287 list_add_tail(&newmode->head, &list); in add_alternate_cea_modes()
4291 list_del(&mode->head); in add_alternate_cea_modes()
4301 /* 0-6 bit vic, 7th bit native mode indicator */ in svd_to_vic()
4313 struct drm_device *dev = connector->dev; in drm_display_mode_from_vic_index()
4333 * do_y420vdb_modes - Parse YCBCR 420 only modes
4338 * Parse the CEA-861-F YCBCR 420 Video Data Block (Y420VDB)
4346 struct drm_device *dev = connector->dev; in do_y420vdb_modes()
4347 struct drm_display_info *info = &connector->display_info; in do_y420vdb_modes()
4348 struct drm_hdmi_info *hdmi = &info->hdmi; in do_y420vdb_modes()
4360 bitmap_set(hdmi->y420_vdb_modes, vic, 1); in do_y420vdb_modes()
4366 info->color_formats |= DRM_COLOR_FORMAT_YCBCR420; in do_y420vdb_modes()
4371 * drm_add_cmdb_modes - Add a YCBCR 420 mode into bitmap
4381 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_add_cmdb_modes()
4386 bitmap_set(hdmi->y420_cmdb_modes, vic, 1); in drm_add_cmdb_modes()
4390 * drm_display_mode_from_cea_vic() - return a mode for CEA VIC
4421 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in do_cea_modes()
4437 if (i < 64 && hdmi->y420_cmdb_map & (1ULL << i)) in do_cea_modes()
4449 int width, height, vrefresh; member
4470 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in stereo_match_mandatory()
4472 return mode->hdisplay == stereo_mode->width && in stereo_match_mandatory()
4473 mode->vdisplay == stereo_mode->height && in stereo_match_mandatory()
4474 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && in stereo_match_mandatory()
4475 drm_mode_vrefresh(mode) == stereo_mode->vrefresh; in stereo_match_mandatory()
4480 struct drm_device *dev = connector->dev; in add_hdmi_mandatory_stereo_modes()
4487 list_for_each_entry(mode, &connector->probed_modes, head) { in add_hdmi_mandatory_stereo_modes()
4501 new_mode->flags |= mandatory->flags; in add_hdmi_mandatory_stereo_modes()
4502 list_add_tail(&new_mode->head, &stereo_modes); in add_hdmi_mandatory_stereo_modes()
4507 list_splice_tail(&stereo_modes, &connector->probed_modes); in add_hdmi_mandatory_stereo_modes()
4514 struct drm_device *dev = connector->dev; in add_hdmi_mode()
4542 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; in add_3d_struct_modes()
4552 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; in add_3d_struct_modes()
4562 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; in add_3d_struct_modes()
4572 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
4584 struct drm_display_info *info = &connector->display_info; in do_hdmi_vsdb_modes()
4638 if (len < (8 + offset + hdmi_3d_len - 1)) in do_hdmi_vsdb_modes()
4665 for (i = 0; i < (hdmi_3d_len - multi_len); i++) { in do_hdmi_vsdb_modes()
4673 if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) in do_hdmi_vsdb_modes()
4701 newmode->flags |= newflag; in do_hdmi_vsdb_modes()
4713 info->has_hdmi_infoframe = true; in do_hdmi_vsdb_modes()
4759 /* CTA-861-H section 7.4 CTA Data BLock Collection */
4767 return db->tag_length >> 5; in cea_db_tag()
4775 return db->tag_length & 0x1f; in cea_db_payload_len()
4780 return db->data; in cea_db_data()
4787 db->data[0] == tag; in cea_db_is_extended_tag()
4804 drm_edid_iter_begin(drm_edid, &iter->edid_iter); in cea_db_iter_edid_begin()
4805 displayid_iter_edid_begin(drm_edid, &iter->displayid_iter); in cea_db_iter_edid_begin()
4813 if (!iter->collection) in __cea_db_iter_current_block()
4816 db = (const struct cea_db *)&iter->collection[iter->index]; in __cea_db_iter_current_block()
4818 if (iter->index + sizeof(*db) <= iter->end && in __cea_db_iter_current_block()
4819 iter->index + sizeof(*db) + cea_db_payload_len(db) <= iter->end) in __cea_db_iter_current_block()
4827 * - CTA-861-H section 7.3.3 CTA Extension Version 3
4836 return d - 4; in cea_db_collection_size()
4841 * - VESA E-EDID v1.4
4842 * - CTA-861-H section 7.3.3 CTA Extension Version 3
4848 drm_edid_iter_for_each(ext, &iter->edid_iter) { in __cea_db_iter_edid_next()
4859 iter->index = 4; in __cea_db_iter_edid_next()
4860 iter->end = iter->index + size; in __cea_db_iter_edid_next()
4870 * - DisplayID v1.3 Appendix C: CEA Data Block within a DisplayID Data Block
4871 * - DisplayID v2.0 section 4.10 CTA DisplayID Data Block
4880 displayid_iter_for_each(block, &iter->displayid_iter) { in __cea_db_iter_displayid_next()
4881 if (block->tag != DATA_BLOCK_CTA) in __cea_db_iter_displayid_next()
4888 iter->index = sizeof(*block); in __cea_db_iter_displayid_next()
4889 iter->end = iter->index + block->num_bytes; in __cea_db_iter_displayid_next()
4901 if (iter->collection) { in __cea_db_iter_next()
4905 iter->collection = NULL; in __cea_db_iter_next()
4910 iter->index += sizeof(*db) + cea_db_payload_len(db); in __cea_db_iter_next()
4926 iter->collection = __cea_db_iter_edid_next(iter); in __cea_db_iter_next()
4927 if (!iter->collection) in __cea_db_iter_next()
4928 iter->collection = __cea_db_iter_displayid_next(iter); in __cea_db_iter_next()
4930 if (!iter->collection) in __cea_db_iter_next()
4944 displayid_iter_end(&iter->displayid_iter); in cea_db_iter_end()
4945 drm_edid_iter_end(&iter->edid_iter); in cea_db_iter_end()
5003 * Get the HF-EEODB override extension block count from EDID.
5013 * - HDMI 2.1 section 10.3.6 HDMI Forum EDID Extension Override Data Block
5019 /* No extensions according to base block, no HF-EEODB. */ in edid_hfeeodb_extension_block_count()
5023 /* HF-EEODB is always in the first EDID extension block only */ in edid_hfeeodb_extension_block_count()
5033 * Sinks that include the HF-EEODB in their E-EDID shall include one and in edid_hfeeodb_extension_block_count()
5034 * only one instance of the HF-EEODB in the E-EDID, occupying bytes 4 in edid_hfeeodb_extension_block_count()
5035 * through 6 of Block 1 of the E-EDID. in edid_hfeeodb_extension_block_count()
5046 struct drm_display_info *info = &connector->display_info; in drm_parse_y420cmdb_bitmap()
5047 struct drm_hdmi_info *hdmi = &info->hdmi; in drm_parse_y420cmdb_bitmap()
5048 u8 map_len = cea_db_payload_len(db) - 1; in drm_parse_y420cmdb_bitmap()
5054 hdmi->y420_cmdb_map = U64_MAX; in drm_parse_y420cmdb_bitmap()
5055 info->color_formats |= DRM_COLOR_FORMAT_YCBCR420; in drm_parse_y420cmdb_bitmap()
5078 info->color_formats |= DRM_COLOR_FORMAT_YCBCR420; in drm_parse_y420cmdb_bitmap()
5080 hdmi->y420_cmdb_map = map; in drm_parse_y420cmdb_bitmap()
5108 cea_db_payload_len(db) - 1); in add_cea_modes()
5140 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
5147 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
5155 if (abs(mode->clock - clock1) < abs(mode->clock - clock2)) in fixup_detailed_cea_mode_clock()
5160 if (mode->clock == clock) in fixup_detailed_cea_mode_clock()
5163 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n", in fixup_detailed_cea_mode_clock()
5164 type, vic, mode->clock, clock); in fixup_detailed_cea_mode_clock()
5165 mode->clock = clock; in fixup_detailed_cea_mode_clock()
5170 struct hdr_static_metadata *hdr_metadata = &connector->hdr_sink_metadata.hdmi_type1; in drm_calculate_luminance_range()
5172 &connector->display_info.luminance_range; in drm_calculate_luminance_range()
5179 if (!(hdr_metadata->metadata_type & BIT(HDMI_STATIC_METADATA_TYPE1))) in drm_calculate_luminance_range()
5182 max_avg = hdr_metadata->max_fall; in drm_calculate_luminance_range()
5183 min_cll = hdr_metadata->min_cll; in drm_calculate_luminance_range()
5186 * From the specification (CTA-861-G), for calculating the maximum in drm_calculate_luminance_range()
5189 * Where CV is a one-byte value. in drm_calculate_luminance_range()
5195 * need to pre-compute the value of r/32. For pre-computing the values in drm_calculate_luminance_range()
5209 luminance_range->min_luminance = min; in drm_calculate_luminance_range()
5210 luminance_range->max_luminance = max; in drm_calculate_luminance_range()
5235 connector->hdr_sink_metadata.hdmi_type1.eotf = in drm_parse_hdr_metadata_block()
5237 connector->hdr_sink_metadata.hdmi_type1.metadata_type = in drm_parse_hdr_metadata_block()
5241 connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4]; in drm_parse_hdr_metadata_block()
5243 connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5]; in drm_parse_hdr_metadata_block()
5245 connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6]; in drm_parse_hdr_metadata_block()
5258 connector->eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_SUPPORTS_AI; in drm_parse_hdmi_vsdb_audio()
5260 connector->latency_present[0] = db[8] >> 7; in drm_parse_hdmi_vsdb_audio()
5261 connector->latency_present[1] = (db[8] >> 6) & 1; in drm_parse_hdmi_vsdb_audio()
5264 connector->video_latency[0] = db[9]; in drm_parse_hdmi_vsdb_audio()
5266 connector->audio_latency[0] = db[10]; in drm_parse_hdmi_vsdb_audio()
5268 connector->video_latency[1] = db[11]; in drm_parse_hdmi_vsdb_audio()
5270 connector->audio_latency[1] = db[12]; in drm_parse_hdmi_vsdb_audio()
5275 connector->latency_present[0], in drm_parse_hdmi_vsdb_audio()
5276 connector->latency_present[1], in drm_parse_hdmi_vsdb_audio()
5277 connector->video_latency[0], in drm_parse_hdmi_vsdb_audio()
5278 connector->video_latency[1], in drm_parse_hdmi_vsdb_audio()
5279 connector->audio_latency[0], in drm_parse_hdmi_vsdb_audio()
5280 connector->audio_latency[1]); in drm_parse_hdmi_vsdb_audio()
5291 *res = timing->data.other_data.data.str.str; in monitor_name()
5314 * drm_edid_get_monitor_name - fetch the monitor name from the edid
5317 * @bufsize: The size of the name buffer (should be at least 14 chars.)
5334 name_length = min(get_monitor_name(&drm_edid, buf), bufsize - 1); in drm_edid_get_monitor_name()
5344 memset(connector->eld, 0, sizeof(connector->eld)); in clear_eld()
5346 connector->latency_present[0] = false; in clear_eld()
5347 connector->latency_present[1] = false; in clear_eld()
5348 connector->video_latency[0] = 0; in clear_eld()
5349 connector->audio_latency[0] = 0; in clear_eld()
5350 connector->video_latency[1] = 0; in clear_eld()
5351 connector->audio_latency[1] = 0; in clear_eld()
5355 * drm_edid_to_eld - build ELD from EDID
5359 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
5365 const struct drm_display_info *info = &connector->display_info; in drm_edid_to_eld()
5368 uint8_t *eld = connector->eld; in drm_edid_to_eld()
5380 eld[DRM_ELD_CEA_EDID_VER_MNL] = info->cea_rev << DRM_ELD_CEA_EDID_VER_SHIFT; in drm_edid_to_eld()
5385 eld[DRM_ELD_MANUFACTURER_NAME0] = drm_edid->edid->mfg_id[0]; in drm_edid_to_eld()
5386 eld[DRM_ELD_MANUFACTURER_NAME1] = drm_edid->edid->mfg_id[1]; in drm_edid_to_eld()
5387 eld[DRM_ELD_PRODUCT_CODE0] = drm_edid->edid->prod_code[0]; in drm_edid_to_eld()
5388 eld[DRM_ELD_PRODUCT_CODE1] = drm_edid->edid->prod_code[1]; in drm_edid_to_eld()
5399 sad_count = min(len / 3, 15 - total_sad_count); in drm_edid_to_eld()
5411 /* HDMI Vendor-Specific Data Block */ in drm_edid_to_eld()
5423 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || in drm_edid_to_eld()
5424 connector->connector_type == DRM_MODE_CONNECTOR_eDP) in drm_edid_to_eld()
5451 return -ENOMEM; in _drm_edid_to_sad()
5453 const u8 *sad = &db->data[j * 3]; in _drm_edid_to_sad()
5471 * drm_edid_to_sad - extracts SADs from EDID
5500 *sadb = kmemdup(db->data, cea_db_payload_len(db), in _drm_edid_to_speaker_allocation()
5503 return -ENOMEM; in _drm_edid_to_speaker_allocation()
5516 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
5537 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
5539 * @mode: the display mode
5541 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
5547 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); in drm_av_sync_delay()
5550 if (!connector->latency_present[0]) in drm_av_sync_delay()
5552 if (!connector->latency_present[1]) in drm_av_sync_delay()
5555 a = connector->audio_latency[i]; in drm_av_sync_delay()
5556 v = connector->video_latency[i]; in drm_av_sync_delay()
5569 a = min(2 * (a - 1), 500); in drm_av_sync_delay()
5571 v = min(2 * (v - 1), 500); in drm_av_sync_delay()
5573 return max(v - a, 0); in drm_av_sync_delay()
5600 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
5603 * Parse the CEA extension according to CEA-861-B.
5661 * drm_detect_monitor_audio - check monitor audio capability
5682 * drm_default_rgb_quant_range - default RGB quantization range
5683 * @mode: display mode
5686 * as specified in CEA-861.
5702 struct drm_display_info *info = &connector->display_info; in drm_parse_vcdb()
5707 info->rgb_quant_range_selectable = true; in drm_parse_vcdb()
5749 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_parse_ycbcr420_deep_color_info()
5752 hdmi->y420_dc_modes = dc_mask; in drm_parse_ycbcr420_deep_color_info()
5759 struct drm_display_info *display = &connector->display_info; in drm_parse_hdmi_forum_scds() local
5760 struct drm_hdmi_info *hdmi = &display->hdmi; in drm_parse_hdmi_forum_scds()
5762 display->has_hdmi_infoframe = true; in drm_parse_hdmi_forum_scds()
5765 hdmi->scdc.supported = true; in drm_parse_hdmi_forum_scds()
5767 hdmi->scdc.read_request = true; in drm_parse_hdmi_forum_scds()
5773 * * Availability of a HF-VSDB block in EDID (check) in drm_parse_hdmi_forum_scds()
5774 * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check) in drm_parse_hdmi_forum_scds()
5782 struct drm_scdc *scdc = &hdmi->scdc; in drm_parse_hdmi_forum_scds()
5785 display->max_tmds_clock = max_tmds_clock; in drm_parse_hdmi_forum_scds()
5786 DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n", in drm_parse_hdmi_forum_scds()
5787 display->max_tmds_clock); in drm_parse_hdmi_forum_scds()
5790 if (scdc->supported) { in drm_parse_hdmi_forum_scds()
5791 scdc->scrambling.supported = true; in drm_parse_hdmi_forum_scds()
5795 scdc->scrambling.low_rates = true; in drm_parse_hdmi_forum_scds()
5803 struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; in drm_parse_hdmi_forum_scds()
5807 drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, in drm_parse_hdmi_forum_scds()
5808 &hdmi->max_frl_rate_per_lane); in drm_parse_hdmi_forum_scds()
5809 hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2; in drm_parse_hdmi_forum_scds()
5811 if (hdmi_dsc->v_1p2) { in drm_parse_hdmi_forum_scds()
5812 hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420; in drm_parse_hdmi_forum_scds()
5813 hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP; in drm_parse_hdmi_forum_scds()
5816 hdmi_dsc->bpc_supported = 16; in drm_parse_hdmi_forum_scds()
5818 hdmi_dsc->bpc_supported = 12; in drm_parse_hdmi_forum_scds()
5820 hdmi_dsc->bpc_supported = 10; in drm_parse_hdmi_forum_scds()
5822 hdmi_dsc->bpc_supported = 0; in drm_parse_hdmi_forum_scds()
5825 drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, in drm_parse_hdmi_forum_scds()
5826 &hdmi_dsc->max_frl_rate_per_lane); in drm_parse_hdmi_forum_scds()
5827 hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; in drm_parse_hdmi_forum_scds()
5832 hdmi_dsc->max_slices = 1; in drm_parse_hdmi_forum_scds()
5833 hdmi_dsc->clk_per_slice = 340; in drm_parse_hdmi_forum_scds()
5836 hdmi_dsc->max_slices = 2; in drm_parse_hdmi_forum_scds()
5837 hdmi_dsc->clk_per_slice = 340; in drm_parse_hdmi_forum_scds()
5840 hdmi_dsc->max_slices = 4; in drm_parse_hdmi_forum_scds()
5841 hdmi_dsc->clk_per_slice = 340; in drm_parse_hdmi_forum_scds()
5844 hdmi_dsc->max_slices = 8; in drm_parse_hdmi_forum_scds()
5845 hdmi_dsc->clk_per_slice = 340; in drm_parse_hdmi_forum_scds()
5848 hdmi_dsc->max_slices = 8; in drm_parse_hdmi_forum_scds()
5849 hdmi_dsc->clk_per_slice = 400; in drm_parse_hdmi_forum_scds()
5852 hdmi_dsc->max_slices = 12; in drm_parse_hdmi_forum_scds()
5853 hdmi_dsc->clk_per_slice = 400; in drm_parse_hdmi_forum_scds()
5856 hdmi_dsc->max_slices = 16; in drm_parse_hdmi_forum_scds()
5857 hdmi_dsc->clk_per_slice = 400; in drm_parse_hdmi_forum_scds()
5861 hdmi_dsc->max_slices = 0; in drm_parse_hdmi_forum_scds()
5862 hdmi_dsc->clk_per_slice = 0; in drm_parse_hdmi_forum_scds()
5873 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_deep_color_info()
5877 info->bpc = 8; in drm_parse_hdmi_deep_color_info()
5884 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_30; in drm_parse_hdmi_deep_color_info()
5886 connector->name); in drm_parse_hdmi_deep_color_info()
5891 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_36; in drm_parse_hdmi_deep_color_info()
5893 connector->name); in drm_parse_hdmi_deep_color_info()
5898 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_48; in drm_parse_hdmi_deep_color_info()
5900 connector->name); in drm_parse_hdmi_deep_color_info()
5905 connector->name); in drm_parse_hdmi_deep_color_info()
5910 connector->name, dc_bpc); in drm_parse_hdmi_deep_color_info()
5911 info->bpc = dc_bpc; in drm_parse_hdmi_deep_color_info()
5915 info->edid_hdmi_ycbcr444_dc_modes = info->edid_hdmi_rgb444_dc_modes; in drm_parse_hdmi_deep_color_info()
5917 connector->name); in drm_parse_hdmi_deep_color_info()
5926 connector->name); in drm_parse_hdmi_deep_color_info()
5933 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_vsdb_video()
5936 info->is_hdmi = true; in drm_parse_hdmi_vsdb_video()
5939 info->dvi_dual = db[6] & 1; in drm_parse_hdmi_vsdb_video()
5941 info->max_tmds_clock = db[7] * 5000; in drm_parse_hdmi_vsdb_video()
5945 info->dvi_dual, in drm_parse_hdmi_vsdb_video()
5946 info->max_tmds_clock); in drm_parse_hdmi_vsdb_video()
5952 * See EDID extension for head-mounted and specialized monitors, specified at:
5953 …* https://docs.microsoft.com/en-us/windows-hardware/drivers/display/specialized-monitors-edid-exte…
5958 struct drm_display_info *info = &connector->display_info; in drm_parse_microsoft_vsdb()
5964 info->non_desktop = true; in drm_parse_microsoft_vsdb()
5966 drm_dbg_kms(connector->dev, "HMD or specialized display VSDB version %u: 0x%02x\n", in drm_parse_microsoft_vsdb()
5973 struct drm_display_info *info = &connector->display_info; in drm_parse_cea_ext()
5984 if (!info->cea_rev) in drm_parse_cea_ext()
5985 info->cea_rev = edid_ext[1]; in drm_parse_cea_ext()
5987 if (info->cea_rev != edid_ext[1]) in drm_parse_cea_ext()
5989 info->cea_rev, edid_ext[1]); in drm_parse_cea_ext()
5992 info->color_formats = DRM_COLOR_FORMAT_RGB444; in drm_parse_cea_ext()
5994 info->color_formats |= DRM_COLOR_FORMAT_YCBCR444; in drm_parse_cea_ext()
5996 info->color_formats |= DRM_COLOR_FORMAT_YCBCR422; in drm_parse_cea_ext()
6026 struct drm_display_info *info = &closure->connector->display_info; in get_monitor_range()
6027 struct drm_monitor_range_info *monitor_range = &info->monitor_range; in get_monitor_range()
6028 const struct detailed_non_pixel *data = &timing->data.other_data; in get_monitor_range()
6029 const struct detailed_data_monitor_range *range = &data->data.range; in get_monitor_range()
6030 const struct edid *edid = closure->drm_edid->edid; in get_monitor_range()
6041 if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) in get_monitor_range()
6044 monitor_range->min_vfreq = range->min_vfreq; in get_monitor_range()
6045 monitor_range->max_vfreq = range->max_vfreq; in get_monitor_range()
6047 if (edid->revision >= 4) { in get_monitor_range()
6048 if (data->pad2 & DRM_EDID_RANGE_OFFSET_MIN_VFREQ) in get_monitor_range()
6049 monitor_range->min_vfreq += 255; in get_monitor_range()
6050 if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ) in get_monitor_range()
6051 monitor_range->max_vfreq += 255; in get_monitor_range()
6058 const struct drm_display_info *info = &connector->display_info; in drm_get_monitor_range()
6069 DRM_DEBUG_KMS("Supported Monitor Refresh rate range is %d Hz - %d Hz\n", in drm_get_monitor_range()
6070 info->monitor_range.min_vfreq, in drm_get_monitor_range()
6071 info->monitor_range.max_vfreq); in drm_get_monitor_range()
6079 struct drm_display_info *info = &connector->display_info; in drm_parse_vesa_mso_data()
6081 if (block->num_bytes < 3) { in drm_parse_vesa_mso_data()
6082 drm_dbg_kms(connector->dev, "Unexpected vendor block size %u\n", in drm_parse_vesa_mso_data()
6083 block->num_bytes); in drm_parse_vesa_mso_data()
6087 if (oui(vesa->oui[0], vesa->oui[1], vesa->oui[2]) != VESA_IEEE_OUI) in drm_parse_vesa_mso_data()
6090 if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) { in drm_parse_vesa_mso_data()
6091 drm_dbg_kms(connector->dev, "Unexpected VESA vendor block size\n"); in drm_parse_vesa_mso_data()
6095 switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) { in drm_parse_vesa_mso_data()
6097 drm_dbg_kms(connector->dev, "Reserved MSO mode value\n"); in drm_parse_vesa_mso_data()
6100 info->mso_stream_count = 0; in drm_parse_vesa_mso_data()
6103 info->mso_stream_count = 2; /* 2 or 4 links */ in drm_parse_vesa_mso_data()
6106 info->mso_stream_count = 4; /* 4 links */ in drm_parse_vesa_mso_data()
6110 if (!info->mso_stream_count) { in drm_parse_vesa_mso_data()
6111 info->mso_pixel_overlap = 0; in drm_parse_vesa_mso_data()
6115 info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso); in drm_parse_vesa_mso_data()
6116 if (info->mso_pixel_overlap > 8) { in drm_parse_vesa_mso_data()
6117 drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap value %u\n", in drm_parse_vesa_mso_data()
6118 info->mso_pixel_overlap); in drm_parse_vesa_mso_data()
6119 info->mso_pixel_overlap = 8; in drm_parse_vesa_mso_data()
6122 drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap %u\n", in drm_parse_vesa_mso_data()
6123 info->mso_stream_count, info->mso_pixel_overlap); in drm_parse_vesa_mso_data()
6134 if (block->tag == DATA_BLOCK_2_VENDOR_SPECIFIC) in drm_update_mso()
6145 struct drm_display_info *info = &connector->display_info; in drm_reset_display_info()
6147 info->width_mm = 0; in drm_reset_display_info()
6148 info->height_mm = 0; in drm_reset_display_info()
6150 info->bpc = 0; in drm_reset_display_info()
6151 info->color_formats = 0; in drm_reset_display_info()
6152 info->cea_rev = 0; in drm_reset_display_info()
6153 info->max_tmds_clock = 0; in drm_reset_display_info()
6154 info->dvi_dual = false; in drm_reset_display_info()
6155 info->is_hdmi = false; in drm_reset_display_info()
6156 info->has_hdmi_infoframe = false; in drm_reset_display_info()
6157 info->rgb_quant_range_selectable = false; in drm_reset_display_info()
6158 memset(&info->hdmi, 0, sizeof(info->hdmi)); in drm_reset_display_info()
6160 info->edid_hdmi_rgb444_dc_modes = 0; in drm_reset_display_info()
6161 info->edid_hdmi_ycbcr444_dc_modes = 0; in drm_reset_display_info()
6163 info->non_desktop = 0; in drm_reset_display_info()
6164 memset(&info->monitor_range, 0, sizeof(info->monitor_range)); in drm_reset_display_info()
6165 memset(&info->luminance_range, 0, sizeof(info->luminance_range)); in drm_reset_display_info()
6167 info->mso_stream_count = 0; in drm_reset_display_info()
6168 info->mso_pixel_overlap = 0; in drm_reset_display_info()
6174 struct drm_display_info *info = &connector->display_info; in update_display_info()
6175 const struct edid *edid = drm_edid->edid; in update_display_info()
6181 info->width_mm = edid->width_cm * 10; in update_display_info()
6182 info->height_mm = edid->height_cm * 10; in update_display_info()
6186 if (edid->revision < 3) in update_display_info()
6189 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) in update_display_info()
6192 info->color_formats |= DRM_COLOR_FORMAT_RGB444; in update_display_info()
6202 if (info->bpc == 0 && edid->revision == 3 && in update_display_info()
6203 edid->input & DRM_EDID_DIGITAL_DFP_1_X) { in update_display_info()
6204 info->bpc = 8; in update_display_info()
6206 connector->name, info->bpc); in update_display_info()
6210 if (edid->revision < 4) in update_display_info()
6213 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { in update_display_info()
6215 info->bpc = 6; in update_display_info()
6218 info->bpc = 8; in update_display_info()
6221 info->bpc = 10; in update_display_info()
6224 info->bpc = 12; in update_display_info()
6227 info->bpc = 14; in update_display_info()
6230 info->bpc = 16; in update_display_info()
6234 info->bpc = 0; in update_display_info()
6238 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n", in update_display_info()
6239 connector->name, info->bpc); in update_display_info()
6241 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) in update_display_info()
6242 info->color_formats |= DRM_COLOR_FORMAT_YCBCR444; in update_display_info()
6243 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) in update_display_info()
6244 info->color_formats |= DRM_COLOR_FORMAT_YCBCR422; in update_display_info()
6250 drm_dbg_kms(connector->dev, "Non-desktop display%s\n", in update_display_info()
6251 info->non_desktop ? " (redundant quirk)" : ""); in update_display_info()
6252 info->non_desktop = true; in update_display_info()
6263 unsigned pixel_clock = (timings->pixel_clock[0] | in drm_mode_displayid_detailed()
6264 (timings->pixel_clock[1] << 8) | in drm_mode_displayid_detailed()
6265 (timings->pixel_clock[2] << 16)) + 1; in drm_mode_displayid_detailed()
6266 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1; in drm_mode_displayid_detailed()
6267 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1; in drm_mode_displayid_detailed()
6268 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
6269 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1; in drm_mode_displayid_detailed()
6270 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1; in drm_mode_displayid_detailed()
6271 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1; in drm_mode_displayid_detailed()
6272 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
6273 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1; in drm_mode_displayid_detailed()
6274 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
6275 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
6282 mode->clock = type_7 ? pixel_clock : pixel_clock * 10; in drm_mode_displayid_detailed()
6283 mode->hdisplay = hactive; in drm_mode_displayid_detailed()
6284 mode->hsync_start = mode->hdisplay + hsync; in drm_mode_displayid_detailed()
6285 mode->hsync_end = mode->hsync_start + hsync_width; in drm_mode_displayid_detailed()
6286 mode->htotal = mode->hdisplay + hblank; in drm_mode_displayid_detailed()
6288 mode->vdisplay = vactive; in drm_mode_displayid_detailed()
6289 mode->vsync_start = mode->vdisplay + vsync; in drm_mode_displayid_detailed()
6290 mode->vsync_end = mode->vsync_start + vsync_width; in drm_mode_displayid_detailed()
6291 mode->vtotal = mode->vdisplay + vblank; in drm_mode_displayid_detailed()
6293 mode->flags = 0; in drm_mode_displayid_detailed()
6294 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; in drm_mode_displayid_detailed()
6295 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; in drm_mode_displayid_detailed()
6296 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_displayid_detailed()
6298 if (timings->flags & 0x80) in drm_mode_displayid_detailed()
6299 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_mode_displayid_detailed()
6313 bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING; in add_displayid_detailed_1_modes()
6315 if (block->num_bytes % 20) in add_displayid_detailed_1_modes()
6318 num_timings = block->num_bytes / 20; in add_displayid_detailed_1_modes()
6320 struct displayid_detailed_timings_1 *timings = &det->timings[i]; in add_displayid_detailed_1_modes()
6322 newmode = drm_mode_displayid_detailed(connector->dev, timings, type_7); in add_displayid_detailed_1_modes()
6341 if (block->tag == DATA_BLOCK_TYPE_1_DETAILED_TIMING || in add_displayid_detailed_modes()
6342 block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING) in add_displayid_detailed_modes()
6363 * CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks. in _drm_edid_connector_update()
6369 /* Depends on info->cea_rev set by update_display_info() above */ in _drm_edid_connector_update()
6374 * - preferred detailed mode in _drm_edid_connector_update()
6375 * - other detailed modes from base block in _drm_edid_connector_update()
6376 * - detailed modes from extension blocks in _drm_edid_connector_update()
6377 * - CVT 3-byte code modes in _drm_edid_connector_update()
6378 * - standard timing codes in _drm_edid_connector_update()
6379 * - established timing codes in _drm_edid_connector_update()
6380 * - modes inferred from GTF or CVT range information in _drm_edid_connector_update()
6393 if (drm_edid->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) in _drm_edid_connector_update()
6400 connector->display_info.bpc = 6; in _drm_edid_connector_update()
6403 connector->display_info.bpc = 8; in _drm_edid_connector_update()
6406 connector->display_info.bpc = 10; in _drm_edid_connector_update()
6409 connector->display_info.bpc = 12; in _drm_edid_connector_update()
6420 struct drm_device *dev = connector->dev; in _drm_edid_connector_property_update()
6423 if (connector->edid_blob_ptr) { in _drm_edid_connector_property_update()
6424 const struct edid *old_edid = connector->edid_blob_ptr->data; in _drm_edid_connector_property_update()
6427 if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : NULL, old_edid)) { in _drm_edid_connector_property_update()
6428 connector->epoch_counter++; in _drm_edid_connector_property_update()
6430 connector->base.id, connector->name, in _drm_edid_connector_property_update()
6431 connector->epoch_counter); in _drm_edid_connector_property_update()
6437 &connector->edid_blob_ptr, in _drm_edid_connector_property_update()
6438 drm_edid ? drm_edid->size : 0, in _drm_edid_connector_property_update()
6439 drm_edid ? drm_edid->edid : NULL, in _drm_edid_connector_property_update()
6440 &connector->base, in _drm_edid_connector_property_update()
6441 dev->mode_config.edid_property); in _drm_edid_connector_property_update()
6444 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6448 ret = drm_object_property_set_value(&connector->base, in _drm_edid_connector_property_update()
6449 dev->mode_config.non_desktop_property, in _drm_edid_connector_property_update()
6450 connector->display_info.non_desktop); in _drm_edid_connector_property_update()
6452 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Non-desktop property update failed (%d)\n", in _drm_edid_connector_property_update()
6453 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6460 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6469 * drm_edid_connector_update - Update connector information from EDID
6473 * Update the connector mode list, display info, ELD, HDR metadata, relevant
6517 if (connector->override_edid) in _drm_connector_update_edid_property()
6521 * Set the display info, using edid if available, otherwise resetting in _drm_connector_update_edid_property()
6539 * drm_connector_update_edid_property - update the edid property of a connector
6565 * drm_add_edid_modes - add modes from EDID data, if available
6582 drm_warn(connector->dev, "%s: EDID invalid.\n", in drm_add_edid_modes()
6583 connector->name); in drm_add_edid_modes()
6593 * drm_add_modes_noedid - add modes for the connectors without EDID
6595 * @hdisplay: the horizontal display limit
6596 * @vdisplay: the vertical display limit
6608 struct drm_device *dev = connector->dev; in drm_add_modes_noedid()
6625 if (ptr->hdisplay > hdisplay || in drm_add_modes_noedid()
6626 ptr->vdisplay > vdisplay) in drm_add_modes_noedid()
6642 * drm_set_preferred_mode - Sets the preferred mode of a connector
6655 list_for_each_entry(mode, &connector->probed_modes, head) { in drm_set_preferred_mode()
6656 if (mode->hdisplay == hpref && in drm_set_preferred_mode()
6657 mode->vdisplay == vpref) in drm_set_preferred_mode()
6658 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_set_preferred_mode()
6666 * FIXME: sil-sii8620 doesn't have a connector around when in is_hdmi2_sink()
6672 return connector->display_info.hdmi.scdc.supported || in is_hdmi2_sink()
6673 connector->display_info.color_formats & DRM_COLOR_FORMAT_YCBCR420; in is_hdmi2_sink()
6680 connector->display_info.has_hdmi_infoframe : false; in drm_mode_hdmi_vic()
6686 if (mode->flags & DRM_MODE_FLAG_3D_MASK) in drm_mode_hdmi_vic()
6709 * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but in drm_mode_cea_vic()
6710 * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we in drm_mode_cea_vic()
6720 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
6721 * data from a DRM display mode
6724 * @mode: DRM display mode
6737 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
6741 if (mode->flags & DRM_MODE_FLAG_DBLCLK) in drm_hdmi_avi_infoframe_from_display_mode()
6742 frame->pixel_repeat = 1; in drm_hdmi_avi_infoframe_from_display_mode()
6747 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; in drm_hdmi_avi_infoframe_from_display_mode()
6754 frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS; in drm_hdmi_avi_infoframe_from_display_mode()
6755 frame->itc = 0; in drm_hdmi_avi_infoframe_from_display_mode()
6761 picture_aspect = mode->picture_aspect_ratio; in drm_hdmi_avi_infoframe_from_display_mode()
6777 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
6780 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
6782 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
6788 frame->video_code = vic; in drm_hdmi_avi_infoframe_from_display_mode()
6789 frame->picture_aspect = picture_aspect; in drm_hdmi_avi_infoframe_from_display_mode()
6790 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; in drm_hdmi_avi_infoframe_from_display_mode()
6791 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN; in drm_hdmi_avi_infoframe_from_display_mode()
6798 * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
6802 * @mode: DRM display mode
6811 const struct drm_display_info *info = &connector->display_info; in drm_hdmi_avi_infoframe_quant_range()
6814 * CEA-861: in drm_hdmi_avi_infoframe_quant_range()
6815 * "A Source shall not send a non-zero Q value that does not correspond in drm_hdmi_avi_infoframe_quant_range()
6820 * HDMI 2.0 recommends sending non-zero Q when it does match the in drm_hdmi_avi_infoframe_quant_range()
6823 if (info->rgb_quant_range_selectable || in drm_hdmi_avi_infoframe_quant_range()
6825 frame->quantization_range = rgb_quant_range; in drm_hdmi_avi_infoframe_quant_range()
6827 frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; in drm_hdmi_avi_infoframe_quant_range()
6830 * CEA-861-F: in drm_hdmi_avi_infoframe_quant_range()
6832 * YQ-field to match the RGB Quantization Range being transmitted in drm_hdmi_avi_infoframe_quant_range()
6834 * set YQ=1) and the Sink shall ignore the YQ-field." in drm_hdmi_avi_infoframe_quant_range()
6837 * by non-zero YQ when receiving RGB. There doesn't seem to be any in drm_hdmi_avi_infoframe_quant_range()
6838 * good way to tell which version of CEA-861 the sink supports, so in drm_hdmi_avi_infoframe_quant_range()
6839 * we limit non-zero YQ to HDMI 2.0 sinks only as HDMI 2.0 is based in drm_hdmi_avi_infoframe_quant_range()
6840 * on on CEA-861-F. in drm_hdmi_avi_infoframe_quant_range()
6844 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
6847 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
6855 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; in s3d_structure_from_display_mode()
6880 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
6881 * data from a DRM display mode
6884 * @mode: DRM display mode
6888 * function will return -EINVAL, error that can be safely ignored.
6898 * FIXME: sil-sii8620 doesn't have a connector around when in drm_hdmi_vendor_infoframe_from_display_mode()
6902 connector->display_info.has_hdmi_infoframe : false; in drm_hdmi_vendor_infoframe_from_display_mode()
6906 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
6909 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
6924 frame->vic = drm_mode_hdmi_vic(connector, mode); in drm_hdmi_vendor_infoframe_from_display_mode()
6925 frame->s3d_struct = s3d_structure_from_display_mode(mode); in drm_hdmi_vendor_infoframe_from_display_mode()
6940 w = tile->tile_size[0] | tile->tile_size[1] << 8; in drm_parse_tiled_block()
6941 h = tile->tile_size[2] | tile->tile_size[3] << 8; in drm_parse_tiled_block()
6943 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30); in drm_parse_tiled_block()
6944 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30); in drm_parse_tiled_block()
6945 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4); in drm_parse_tiled_block()
6946 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4); in drm_parse_tiled_block()
6948 connector->has_tile = true; in drm_parse_tiled_block()
6949 if (tile->tile_cap & 0x80) in drm_parse_tiled_block()
6950 connector->tile_is_single_monitor = true; in drm_parse_tiled_block()
6952 connector->num_h_tile = num_h_tile + 1; in drm_parse_tiled_block()
6953 connector->num_v_tile = num_v_tile + 1; in drm_parse_tiled_block()
6954 connector->tile_h_loc = tile_h_loc; in drm_parse_tiled_block()
6955 connector->tile_v_loc = tile_v_loc; in drm_parse_tiled_block()
6956 connector->tile_h_size = w + 1; in drm_parse_tiled_block()
6957 connector->tile_v_size = h + 1; in drm_parse_tiled_block()
6959 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap); in drm_parse_tiled_block()
6963 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]); in drm_parse_tiled_block()
6965 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
6967 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
6971 if (connector->tile_group != tg) { in drm_parse_tiled_block()
6974 if (connector->tile_group) in drm_parse_tiled_block()
6975 drm_mode_put_tile_group(connector->dev, connector->tile_group); in drm_parse_tiled_block()
6976 connector->tile_group = tg; in drm_parse_tiled_block()
6979 drm_mode_put_tile_group(connector->dev, tg); in drm_parse_tiled_block()
6989 connector->has_tile = false; in _drm_update_tile_info()
6993 if (block->tag == DATA_BLOCK_TILED_DISPLAY) in _drm_update_tile_info()
6998 if (!connector->has_tile && connector->tile_group) { in _drm_update_tile_info()
6999 drm_mode_put_tile_group(connector->dev, connector->tile_group); in _drm_update_tile_info()
7000 connector->tile_group = NULL; in _drm_update_tile_info()