25 	WR_INPUT_SOURCE		= 0x05,	/* Write Input Source Select */
26 	WR_EXT_SOURCE_FMT	= 0x07, /* Write External Video Source Format */
27 	WR_IMAGE_CROP		= 0x10,	/* Write Image Crop */
28 	WR_DISPLAY_SIZE		= 0x12,	/* Write Display Size */
29 	WR_IMAGE_FREEZE		= 0x1A,	/* Write Image Freeze */
30 	WR_INPUT_IMAGE_SIZE	= 0x2E,	/* Write External Input Image Size */
31 	WR_RGB_LED_EN		= 0x52,	/* Write RGB LED Enable */
32 	WR_RGB_LED_CURRENT	= 0x54,	/* Write RGB LED Current */
33 	WR_RGB_LED_MAX_CURRENT	= 0x5C,	/* Write RGB LED Max Current */
34 	WR_DSI_HS_CLK		= 0xBD,	/* Write DSI HS Clock */
35 	RD_DEVICE_ID		= 0xD4,	/* Read Controller Device ID */
36 	WR_DSI_PORT_EN		= 0xD7,	/* Write DSI Port Enable */
40 	INPUT_EXTERNAL_VIDEO	= 0,
45 #define DEV_ID_MASK		GENMASK(3, 0)
46 #define IMAGE_FREESE_EN		BIT(0)
47 #define DSI_PORT_EN		0
48 #define EXT_SOURCE_FMT_DSI	0
49 #define RED_LED_EN		BIT(0)
52 #define LED_MASK		GENMASK(2, 0)
89 	{ .range_min = 0x10, .range_max = 0xBF },
120 	DRM_DEV_DEBUG(dev, "DLPC3433 device id: 0x%02x\n", devid);  in dlpc_atomic_enable()
122 	if (devid != 0x01) {  in dlpc_atomic_enable()
123 		DRM_DEV_ERROR(dev, "Unsupported DLPC device id: 0x%02x\n", devid);  in dlpc_atomic_enable()
133 	memset(buf, 0, MAX_BYTE_SIZE);  in dlpc_atomic_enable()
136 	buf[4] = mode->hdisplay & 0xff;  in dlpc_atomic_enable()
137 	buf[5] = (mode->hdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
138 	buf[6] = mode->vdisplay & 0xff;  in dlpc_atomic_enable()
139 	buf[7] = (mode->vdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
143 	buf[4] = mode->hdisplay & 0xff;  in dlpc_atomic_enable()
144 	buf[5] = (mode->hdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
145 	buf[6] = mode->vdisplay & 0xff;  in dlpc_atomic_enable()
146 	buf[7] = (mode->vdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
150 	buf[0] = mode->hdisplay & 0xff;  in dlpc_atomic_enable()
151 	buf[1] = (mode->hdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
152 	buf[2] = mode->vdisplay & 0xff;  in dlpc_atomic_enable()
153 	buf[3] = (mode->vdisplay & 0xff00) >> 8;  in dlpc_atomic_enable()
163 	regmap_write(regmap, WR_IMAGE_FREEZE, 0x00);  in dlpc_atomic_enable()
205 	gpiod_set_value(dlpc->enable_gpio, 0);  in dlpc_atomic_post_disable()
222 	*num_input_fmts = 0;  in dlpc_atomic_get_input_bus_fmts()
230 	input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;  in dlpc_atomic_get_input_bus_fmts()
285 	dlpc->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);  in dlpc3433_parse_dt()
289 	endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, 0);  in dlpc3433_parse_dt()
291 	if (dlpc->dsi_lanes < 0 || dlpc->dsi_lanes > 4) {  in dlpc3433_parse_dt()
304 	return 0;  in dlpc3433_parse_dt()
319 		.channel = 0,  in dlpc_host_attach()
375 	return 0;  in dlpc3433_probe()
391 	{ "ti,dlpc3433", 0 },