29 	HDMI_AHB_DMA_START_START = BIT(0),
30 	HDMI_AHB_DMA_STOP_STOP = BIT(0),
36 	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
49 	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
59 	HDMI_AHB_DMA_CONF0_INCR4 = 0,
60 	HDMI_AHB_DMA_CONF0_BURST_MODE = BIT(0),
63 	HDMI_REVISION_ID = 0x0001,
64 	HDMI_IH_AHBDMAAUD_STAT0 = 0x0109,
65 	HDMI_IH_MUTE_AHBDMAAUD_STAT0 = 0x0189,
66 	HDMI_AHB_DMA_CONF0 = 0x3600,
67 	HDMI_AHB_DMA_START = 0x3601,
68 	HDMI_AHB_DMA_STOP = 0x3602,
69 	HDMI_AHB_DMA_THRSLD = 0x3603,
70 	HDMI_AHB_DMA_STRADDR0 = 0x3604,
71 	HDMI_AHB_DMA_STPADDR0 = 0x3608,
72 	HDMI_AHB_DMA_MASK = 0x3614,
73 	HDMI_AHB_DMA_POL = 0x3615,
74 	HDMI_AHB_DMA_CONF1 = 0x3616,
75 	HDMI_AHB_DMA_BUFFPOL = 0x361a,
90  *		Front	Sur4.0	Sur4.1	Sur5.0	Sur5.1	Sur7.1
97  * 0		FL:0	=	=	=	=	=	=
107 	{ 0x03, 0x00 },	/* FL,FR */
108 	{ 0x0b, 0x02 },	/* FL,FR,FC */
109 	{ 0x33, 0x08 },	/* FL,FR,RL,RR */
110 	{ 0x37, 0x09 },	/* FL,FR,LFE,RL,RR */
111 	{ 0x3f, 0x0b },	/* FL,FR,LFE,FC,RL,RR */
112 	{ 0x7f, 0x0f },	/* FL,FR,LFE,FC,RL,RR,RC */
113 	{ 0xff, 0x13 },	/* FL,FR,LFE,FC,RL,RR,[FR]RC,[FR]LC */
147  * samples in 23..0.
149  * Default preamble in bits 3..0: 8 = block start, 4 = even 2 = odd
194 			dw->iec_offset = 0;  in dw_hdmi_reformat_s24()
200 			sample &= ~0xff000000;  in dw_hdmi_reformat_s24()
202 			sample |= parity(sample & ~0xf8000000);  in dw_hdmi_reformat_s24()
217 	memset(dw->cs, 0, sizeof(dw->cs));  in dw_hdmi_create_cs()
219 	for (ch = 0; ch < 8; ch++) {  in dw_hdmi_create_cs()
223 		for (i = 0; i < ARRAY_SIZE(cs); i++) {  in dw_hdmi_create_cs()
226 			for (j = 0; j < 8; j++, c >>= 1)  in dw_hdmi_create_cs()
230 	dw->cs[0][0] |= BIT(4);  in dw_hdmi_create_cs()
258 		offset = 0;  in dw_hdmi_start_dma()
265 	writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK);  in dw_hdmi_stop_dma()
315 	.fifo_size = 0,
331 		if (ret < 0)  in dw_hdmi_open()
336 	if (ret < 0)  in dw_hdmi_open()
341 	if (ret < 0)  in dw_hdmi_open()
347 					   0, substream->dma_buffer.bytes);  in dw_hdmi_open()
348 	if (ret < 0)  in dw_hdmi_open()
356 	writeb_relaxed(~0, base + HDMI_AHB_DMA_POL);  in dw_hdmi_open()
357 	writeb_relaxed(~0, base + HDMI_AHB_DMA_BUFFPOL);  in dw_hdmi_open()
360 	writeb_relaxed(~0, base + HDMI_AHB_DMA_MASK);  in dw_hdmi_open()
361 	writeb_relaxed(~0, base + HDMI_IH_AHBDMAAUD_STAT0);  in dw_hdmi_open()
373 	return 0;  in dw_hdmi_open()
386 	return 0;  in dw_hdmi_close()
408 	/* Setup as per 3.0.5 FSL 4.1.0 BSP */  in dw_hdmi_prepare()
410 	case 0x0a:  in dw_hdmi_prepare()
418 	case 0x1a:  in dw_hdmi_prepare()
453 	dw->iec_offset = 0;  in dw_hdmi_prepare()
461 	return 0;  in dw_hdmi_prepare()
468 	int ret = 0;  in dw_hdmi_trigger()
473 		dw->buf_offset = 0;  in dw_hdmi_trigger()
534 	if (revision != 0x0a && revision != 0x1a) {  in snd_dw_hdmi_probe()
535 		dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n",  in snd_dw_hdmi_probe()
542 	if (ret < 0)  in snd_dw_hdmi_probe()
548 		 "%s rev 0x%02x, irq %d", card->shortname, revision,  in snd_dw_hdmi_probe()
558 	ret = snd_pcm_new(card, "DW HDMI", 0, 1, 0, &pcm);  in snd_dw_hdmi_probe()
559 	if (ret < 0)  in snd_dw_hdmi_probe()
575 	if (ret < 0)  in snd_dw_hdmi_probe()
580 	return 0;  in snd_dw_hdmi_probe()
593 	return 0;  in snd_dw_hdmi_remove()
607 	return 0;  in snd_dw_hdmi_suspend()
616 	return 0;  in snd_dw_hdmi_resume()