Lines Matching +full:0 +full:x4b
21 #define ADV7511_REG_CHIP_REVISION 0x00
22 #define ADV7511_REG_N0 0x01
23 #define ADV7511_REG_N1 0x02
24 #define ADV7511_REG_N2 0x03
25 #define ADV7511_REG_SPDIF_FREQ 0x04
26 #define ADV7511_REG_CTS_AUTOMATIC1 0x05
27 #define ADV7511_REG_CTS_AUTOMATIC2 0x06
28 #define ADV7511_REG_CTS_MANUAL0 0x07
29 #define ADV7511_REG_CTS_MANUAL1 0x08
30 #define ADV7511_REG_CTS_MANUAL2 0x09
31 #define ADV7511_REG_AUDIO_SOURCE 0x0a
32 #define ADV7511_REG_AUDIO_CONFIG 0x0b
33 #define ADV7511_REG_I2S_CONFIG 0x0c
34 #define ADV7511_REG_I2S_WIDTH 0x0d
35 #define ADV7511_REG_AUDIO_SUB_SRC0 0x0e
36 #define ADV7511_REG_AUDIO_SUB_SRC1 0x0f
37 #define ADV7511_REG_AUDIO_SUB_SRC2 0x10
38 #define ADV7511_REG_AUDIO_SUB_SRC3 0x11
39 #define ADV7511_REG_AUDIO_CFG1 0x12
40 #define ADV7511_REG_AUDIO_CFG2 0x13
41 #define ADV7511_REG_AUDIO_CFG3 0x14
42 #define ADV7511_REG_I2C_FREQ_ID_CFG 0x15
43 #define ADV7511_REG_VIDEO_INPUT_CFG1 0x16
44 #define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2)
45 #define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2)
46 #define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x))
47 #define ADV7511_REG_DE_GENERATOR (0x35 + (x))
48 #define ADV7511_REG_PIXEL_REPETITION 0x3b
49 #define ADV7511_REG_VIC_MANUAL 0x3c
50 #define ADV7511_REG_VIC_SEND 0x3d
51 #define ADV7511_REG_VIC_DETECTED 0x3e
52 #define ADV7511_REG_AUX_VIC_DETECTED 0x3f
53 #define ADV7511_REG_PACKET_ENABLE0 0x40
54 #define ADV7511_REG_POWER 0x41
55 #define ADV7511_REG_STATUS 0x42
56 #define ADV7511_REG_EDID_I2C_ADDR 0x43
57 #define ADV7511_REG_PACKET_ENABLE1 0x44
58 #define ADV7511_REG_PACKET_I2C_ADDR 0x45
59 #define ADV7511_REG_DSD_ENABLE 0x46
60 #define ADV7511_REG_VIDEO_INPUT_CFG2 0x48
61 #define ADV7511_REG_INFOFRAME_UPDATE 0x4a
62 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
63 #define ADV7511_REG_AVI_INFOFRAME_VERSION 0x52
64 #define ADV7511_REG_AVI_INFOFRAME_LENGTH 0x53
65 #define ADV7511_REG_AVI_INFOFRAME_CHECKSUM 0x54
66 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
67 #define ADV7511_REG_AUDIO_INFOFRAME_VERSION 0x70
68 #define ADV7511_REG_AUDIO_INFOFRAME_LENGTH 0x71
69 #define ADV7511_REG_AUDIO_INFOFRAME_CHECKSUM 0x72
70 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
71 #define ADV7511_REG_INT_ENABLE(x) (0x94 + (x))
72 #define ADV7511_REG_INT(x) (0x96 + (x))
73 #define ADV7511_REG_INPUT_CLK_DIV 0x9d
74 #define ADV7511_REG_PLL_STATUS 0x9e
75 #define ADV7511_REG_HDMI_POWER 0xa1
76 #define ADV7511_REG_HDCP_HDMI_CFG 0xaf
77 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
78 #define ADV7511_REG_HDCP_STATUS 0xb8
79 #define ADV7511_REG_BCAPS 0xbe
80 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
81 #define ADV7511_REG_EDID_SEGMENT 0xc4
82 #define ADV7511_REG_DDC_STATUS 0xc8
83 #define ADV7511_REG_EDID_READ_CTRL 0xc9
84 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
85 #define ADV7511_REG_TIMING_GEN_SEQ 0xd0
86 #define ADV7511_REG_POWER2 0xd6
87 #define ADV7511_REG_HSYNC_PLACEMENT_MSB 0xfa
89 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
90 #define ADV7511_REG_TMDS_CLOCK_INV 0xde
91 #define ADV7511_REG_ARC_CTRL 0xdf
92 #define ADV7511_REG_CEC_I2C_ADDR 0xe1
93 #define ADV7511_REG_CEC_CTRL 0xe2
94 #define ADV7511_REG_CHIP_ID_HIGH 0xf5
95 #define ADV7511_REG_CHIP_ID_LOW 0xf6
98 #define ADV7511_CEC_I2C_ADDR_DEFAULT 0x3c
99 #define ADV7511_EDID_I2C_ADDR_DEFAULT 0x3f
100 #define ADV7511_PACKET_I2C_ADDR_DEFAULT 0x38
118 #define ADV7511_INT1_CEC_RX_READY1 BIT(0)
120 #define ADV7511_ARC_CTRL_POWER_DOWN BIT(0)
122 #define ADV7511_CEC_CTRL_POWER_DOWN BIT(0)
126 #define ADV7511_HDMI_CFG_MODE_MASK 0x2
127 #define ADV7511_HDMI_CFG_MODE_DVI 0x0
128 #define ADV7511_HDMI_CFG_MODE_HDMI 0x2
130 #define ADV7511_AUDIO_SELECT_I2C 0x0
131 #define ADV7511_AUDIO_SELECT_SPDIF 0x1
132 #define ADV7511_AUDIO_SELECT_DSD 0x2
133 #define ADV7511_AUDIO_SELECT_HBR 0x3
134 #define ADV7511_AUDIO_SELECT_DST 0x4
136 #define ADV7511_I2S_SAMPLE_LEN_16 0x2
137 #define ADV7511_I2S_SAMPLE_LEN_20 0x3
138 #define ADV7511_I2S_SAMPLE_LEN_18 0x4
139 #define ADV7511_I2S_SAMPLE_LEN_22 0x5
140 #define ADV7511_I2S_SAMPLE_LEN_19 0x8
141 #define ADV7511_I2S_SAMPLE_LEN_23 0x9
142 #define ADV7511_I2S_SAMPLE_LEN_24 0xb
143 #define ADV7511_I2S_SAMPLE_LEN_17 0xc
144 #define ADV7511_I2S_SAMPLE_LEN_21 0xd
146 #define ADV7511_SAMPLE_FREQ_44100 0x0
147 #define ADV7511_SAMPLE_FREQ_48000 0x2
148 #define ADV7511_SAMPLE_FREQ_32000 0x3
149 #define ADV7511_SAMPLE_FREQ_88200 0x8
150 #define ADV7511_SAMPLE_FREQ_96000 0xa
151 #define ADV7511_SAMPLE_FREQ_176400 0xc
152 #define ADV7511_SAMPLE_FREQ_192000 0xe
170 #define ADV7511_PACKET_ENABLE_SPARE1 BIT(0)
173 #define ADV7511_REG_POWER2_HPD_SRC_MASK 0xc0
174 #define ADV7511_REG_POWER2_HPD_SRC_BOTH 0x00
175 #define ADV7511_REG_POWER2_HPD_SRC_HPD 0x40
176 #define ADV7511_REG_POWER2_HPD_SRC_CEC 0x80
177 #define ADV7511_REG_POWER2_HPD_SRC_NONE 0xc0
179 #define ADV7511_REG_POWER2_GATE_INPUT_CLK BIT(0)
181 #define ADV7511_LOW_REFRESH_RATE_NONE 0x0
182 #define ADV7511_LOW_REFRESH_RATE_24HZ 0x1
183 #define ADV7511_LOW_REFRESH_RATE_25HZ 0x2
184 #define ADV7511_LOW_REFRESH_RATE_30HZ 0x3
186 #define ADV7511_AUDIO_CFG3_LEN_MASK 0x0f
187 #define ADV7511_I2C_FREQ_ID_CFG_RATE_MASK 0xf0
189 #define ADV7511_AUDIO_SOURCE_I2S 0
192 #define ADV7511_I2S_FORMAT_I2S 0
197 #define ADV7511_PACKET(p, x) ((p) * 0x20 + (x))
198 #define ADV7511_PACKET_SDP(x) ADV7511_PACKET(0, x)
206 #define ADV7511_REG_CEC_TX_FRAME_HDR 0x00
207 #define ADV7511_REG_CEC_TX_FRAME_DATA0 0x01
208 #define ADV7511_REG_CEC_TX_FRAME_LEN 0x10
209 #define ADV7511_REG_CEC_TX_ENABLE 0x11
210 #define ADV7511_REG_CEC_TX_RETRY 0x12
211 #define ADV7511_REG_CEC_TX_LOW_DRV_CNT 0x14
212 #define ADV7511_REG_CEC_RX1_FRAME_HDR 0x15
213 #define ADV7511_REG_CEC_RX1_FRAME_DATA0 0x16
214 #define ADV7511_REG_CEC_RX1_FRAME_LEN 0x25
215 #define ADV7511_REG_CEC_RX_STATUS 0x26
216 #define ADV7511_REG_CEC_RX2_FRAME_HDR 0x27
217 #define ADV7511_REG_CEC_RX2_FRAME_DATA0 0x28
218 #define ADV7511_REG_CEC_RX2_FRAME_LEN 0x37
219 #define ADV7511_REG_CEC_RX3_FRAME_HDR 0x38
220 #define ADV7511_REG_CEC_RX3_FRAME_DATA0 0x39
221 #define ADV7511_REG_CEC_RX3_FRAME_LEN 0x48
222 #define ADV7511_REG_CEC_RX_BUFFERS 0x4a
223 #define ADV7511_REG_CEC_LOG_ADDR_MASK 0x4b
224 #define ADV7511_REG_CEC_LOG_ADDR_0_1 0x4c
225 #define ADV7511_REG_CEC_LOG_ADDR_2 0x4d
226 #define ADV7511_REG_CEC_CLK_DIV 0x4e
227 #define ADV7511_REG_CEC_SOFT_RESET 0x50
229 #define ADV7533_REG_CEC_OFFSET 0x70
238 ADV7511_INPUT_JUSTIFICATION_EVENLY = 0,
244 ADV7511_INPUT_SYNC_PULSE_DE = 0,
306 ADV7511_CSC_SCALING_1 = 0,
399 return 0; in adv7511_cec_init()
417 return 0; in adv7511_audio_init()