Lines Matching +full:0 +full:x2c
37 .regs_offset = 0x40,
38 .id = 0,
40 .cfgs_offset = 0x2c,
46 .clut_offset = 0x400,
51 .min_width = 0,
52 .min_height = 0,
55 .max_spw = 0x3f,
56 .max_vpw = 0x3f,
57 .max_hpw = 0xff,
67 .regs_offset = 0x40,
68 .id = 0,
70 .cfgs_offset = 0x2c,
78 .clut_offset = 0x400,
83 .regs_offset = 0x100,
86 .cfgs_offset = 0x2c,
97 .clut_offset = 0x800,
102 .regs_offset = 0x280,
105 .cfgs_offset = 0x4c,
119 .clut_offset = 0x1000,
124 .regs_offset = 0x340,
129 .cfgs_offset = 0x2c,
139 .clut_offset = 0x1400,
144 .min_width = 0,
145 .min_height = 0,
148 .max_spw = 0x3f,
149 .max_vpw = 0x3f,
150 .max_hpw = 0xff,
160 .regs_offset = 0x40,
161 .id = 0,
163 .cfgs_offset = 0x2c,
171 .clut_offset = 0x600,
176 .regs_offset = 0x140,
179 .cfgs_offset = 0x2c,
190 .clut_offset = 0xa00,
195 .regs_offset = 0x240,
198 .cfgs_offset = 0x2c,
209 .clut_offset = 0xe00,
214 .regs_offset = 0x340,
217 .cfgs_offset = 0x4c,
235 .clut_offset = 0x1200,
240 .regs_offset = 0x440,
245 .cfgs_offset = 0x2c,
257 .clut_offset = 0x1600,
262 .min_width = 0,
263 .min_height = 0,
266 .max_spw = 0x3f,
267 .max_vpw = 0x3f,
268 .max_hpw = 0x1ff,
278 .regs_offset = 0x40,
279 .id = 0,
281 .cfgs_offset = 0x2c,
289 .clut_offset = 0x600,
294 .regs_offset = 0x140,
297 .cfgs_offset = 0x2c,
308 .clut_offset = 0xa00,
313 .regs_offset = 0x240,
316 .cfgs_offset = 0x2c,
327 .clut_offset = 0xe00,
332 .regs_offset = 0x340,
335 .cfgs_offset = 0x4c,
353 .clut_offset = 0x1200,
358 .min_width = 0,
359 .min_height = 0,
362 .max_spw = 0xff,
363 .max_vpw = 0xff,
364 .max_hpw = 0x3ff,
373 .regs_offset = 0x60,
374 .id = 0,
376 .cfgs_offset = 0x2c,
384 .clut_offset = 0x600,
389 .regs_offset = 0x160,
392 .cfgs_offset = 0x2c,
403 .clut_offset = 0xa00,
408 .regs_offset = 0x260,
411 .cfgs_offset = 0x2c,
422 .clut_offset = 0xe00,
427 .regs_offset = 0x360,
430 .cfgs_offset = 0x4c,
448 .clut_offset = 0x1200,
453 .min_width = 0,
454 .min_height = 0,
457 .max_spw = 0xff,
458 .max_vpw = 0xff,
459 .max_hpw = 0x3ff,
517 vback_porch > dc->desc->max_vpw || vback_porch < 0 || in atmel_hlcdc_dc_mode_valid()
552 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) { in atmel_hlcdc_dc_irq_handler()
563 unsigned int cfg = 0; in atmel_hlcdc_dc_irq_postinstall()
567 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) { in atmel_hlcdc_dc_irq_postinstall()
580 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, 0xffffffff); in atmel_hlcdc_dc_irq_disable()
590 ret = devm_request_irq(dev->dev, irq, atmel_hlcdc_dc_irq_handler, 0, in atmel_hlcdc_dc_irq_install()
597 return 0; in atmel_hlcdc_dc_irq_install()
643 return 0; in atmel_hlcdc_dc_modeset_init()
681 if (ret < 0) { in atmel_hlcdc_dc_load()
687 if (ret < 0) { in atmel_hlcdc_dc_load()
697 if (ret < 0) { in atmel_hlcdc_dc_load()
706 return 0; in atmel_hlcdc_dc_load()
743 .minor = 0,
759 ret = drm_dev_register(ddev, 0); in atmel_hlcdc_dc_drm_probe()
765 return 0; in atmel_hlcdc_dc_drm_probe()
784 return 0; in atmel_hlcdc_dc_drm_remove()
805 return 0; in atmel_hlcdc_dc_drm_suspend()