Lines Matching full:handle
307 int (*pre_set_power_state)(void *handle);
308 int (*set_power_state)(void *handle);
309 void (*post_set_power_state)(void *handle);
310 void (*display_configuration_changed)(void *handle);
311 void (*print_power_state)(void *handle, void *ps);
312 bool (*vblank_too_short)(void *handle);
313 void (*enable_bapm)(void *handle, bool enable);
314 int (*check_state_equal)(void *handle,
319 int (*set_fan_control_mode)(void *handle, u32 mode);
320 int (*get_fan_control_mode)(void *handle, u32 *fan_mode);
321 int (*set_fan_speed_pwm)(void *handle, u32 speed);
322 int (*get_fan_speed_pwm)(void *handle, u32 *speed);
323 int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);
324 int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf);
325 int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);
326 int (*force_performance_level)(void *handle, enum amd_dpm_forced_level level);
327 int (*get_sclk_od)(void *handle);
328 int (*set_sclk_od)(void *handle, uint32_t value);
329 int (*get_mclk_od)(void *handle);
330 int (*set_mclk_od)(void *handle, uint32_t value);
331 int (*read_sensor)(void *handle, int idx, void *value, int *size);
332 enum amd_dpm_forced_level (*get_performance_level)(void *handle);
333 enum amd_pm_state_type (*get_current_power_state)(void *handle);
334 int (*get_fan_speed_rpm)(void *handle, uint32_t *rpm);
335 int (*set_fan_speed_rpm)(void *handle, uint32_t rpm);
336 int (*get_pp_num_states)(void *handle, struct pp_states_info *data);
337 int (*get_pp_table)(void *handle, char **table);
338 int (*set_pp_table)(void *handle, const char *buf, size_t size);
339 void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);
340 int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
342 struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
343 int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
345 int (*load_firmware)(void *handle);
346 int (*wait_for_fw_loading_complete)(void *handle);
347 int (*set_powergating_by_smu)(void *handle,
349 int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
350 int (*set_power_limit)(void *handle, uint32_t n);
351 int (*get_power_limit)(void *handle, uint32_t *limit,
354 int (*get_power_profile_mode)(void *handle, char *buf);
355 int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
356 int (*set_fine_grain_clk_vol)(void *handle, uint32_t type, long *input, uint32_t size);
357 int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
358 int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
359 int (*smu_i2c_bus_access)(void *handle, bool acquire);
360 int (*gfx_state_change_set)(void *handle, uint32_t state);
362 u32 (*get_sclk)(void *handle, bool low);
363 u32 (*get_mclk)(void *handle, bool low);
364 int (*display_configuration_change)(void *handle,
366 int (*get_display_power_level)(void *handle,
368 int (*get_current_clocks)(void *handle,
370 int (*get_clock_by_type)(void *handle,
373 int (*get_clock_by_type_with_latency)(void *handle,
376 int (*get_clock_by_type_with_voltage)(void *handle,
379 int (*set_watermarks_for_clocks_ranges)(void *handle,
381 int (*display_clock_voltage_request)(void *handle,
383 int (*get_display_mode_validation_clocks)(void *handle,
385 int (*notify_smu_enable_pwe)(void *handle);
386 int (*enable_mgpu_fan_boost)(void *handle);
387 int (*set_active_display_count)(void *handle, uint32_t count);
388 int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);
389 int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);
390 int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);
391 int (*get_asic_baco_capability)(void *handle, bool *cap);
392 int (*get_asic_baco_state)(void *handle, int *state);
393 int (*set_asic_baco_state)(void *handle, int state);
394 int (*get_ppfeature_status)(void *handle, char *buf);
395 int (*set_ppfeature_status)(void *handle, uint64_t ppfeature_masks);
396 int (*asic_reset_mode_2)(void *handle);
397 int (*set_df_cstate)(void *handle, enum pp_df_cstate state);
398 int (*set_xgmi_pstate)(void *handle, uint32_t pstate);
399 ssize_t (*get_gpu_metrics)(void *handle, void **table);
400 int (*set_watermarks_for_clock_ranges)(void *handle,
402 int (*display_disable_memory_clock_switch)(void *handle,
404 int (*get_max_sustainable_clocks_by_dc)(void *handle,
406 int (*get_uclk_dpm_states)(void *handle,
409 int (*get_dpm_clock_table)(void *handle,
411 int (*get_smu_prv_buf_details)(void *handle, void **addr, size_t *size);
412 void (*pm_compute_clocks)(void *handle);