Lines Matching refs:RREG32
48 return RREG32(mmUVD_RBC_RB_RPTR); in uvd_v3_1_ring_get_rptr()
62 return RREG32(mmUVD_RBC_RB_WPTR); in uvd_v3_1_ring_get_wptr()
155 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v3_1_ring_test_ring()
213 tmp = RREG32(mmUVD_CGC_CTRL); in uvd_v3_1_set_dcm()
291 if (RREG32(mmUVD_FW_STATUS) & UVD_FW_STATUS__DONE_MASK) in uvd_v3_1_fw_validate()
298 if (!(RREG32(mmUVD_FW_STATUS) & UVD_FW_STATUS__PASS_MASK)) in uvd_v3_1_fw_validate()
303 if (!(RREG32(mmUVD_FW_STATUS) & UVD_FW_STATUS__BUSY_MASK)) in uvd_v3_1_fw_validate()
358 tmp = RREG32(mmUVD_MPC_CNTL); in uvd_v3_1_start()
385 status = RREG32(mmUVD_STATUS); in uvd_v3_1_start()
426 ring->wptr = RREG32(mmUVD_RBC_RB_RPTR); in uvd_v3_1_start()
456 status = RREG32(mmUVD_STATUS); in uvd_v3_1_stop()
467 status = RREG32(mmUVD_LMI_STATUS); in uvd_v3_1_stop()
481 status = RREG32(mmUVD_LMI_STATUS); in uvd_v3_1_stop()
607 orig = data = RREG32(mmUVD_CGC_CTRL); in uvd_v3_1_enable_mgcg()
616 orig = data = RREG32(mmUVD_CGC_CTRL); in uvd_v3_1_enable_mgcg()
703 if (RREG32(mmUVD_STATUS) != 0) in uvd_v3_1_hw_fini()
761 return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK); in uvd_v3_1_is_idle()
770 if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK)) in uvd_v3_1_wait_for_idle()