284 				   struct amdgpu_ib *ib,  in sdma_v5_2_ring_emit_ib()  argument
303 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v5_2_ring_emit_ib()
304 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v5_2_ring_emit_ib()
305 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v5_2_ring_emit_ib()
966 	struct amdgpu_ib ib;  in sdma_v5_2_ring_test_ib()  local
975 	memset(&ib, 0, sizeof(ib));  in sdma_v5_2_ring_test_ib()
980 		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);  in sdma_v5_2_ring_test_ib()
981 		ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);  in sdma_v5_2_ring_test_ib()
998 		r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);  in sdma_v5_2_ring_test_ib()
1005 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v5_2_ring_test_ib()
1007 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v5_2_ring_test_ib()
1008 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v5_2_ring_test_ib()
1009 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0);  in sdma_v5_2_ring_test_ib()
1010 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v5_2_ring_test_ib()
1011 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_2_ring_test_ib()
1012 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_2_ring_test_ib()
1013 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_2_ring_test_ib()
1014 	ib.length_dw = 8;  in sdma_v5_2_ring_test_ib()
1016 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v5_2_ring_test_ib()
1041 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v5_2_ring_test_ib()
1060 static void sdma_v5_2_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v5_2_vm_copy_pte()  argument
1066 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v5_2_vm_copy_pte()
1068 	ib->ptr[ib->length_dw++] = bytes - 1;  in sdma_v5_2_vm_copy_pte()
1069 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v5_2_vm_copy_pte()
1070 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v5_2_vm_copy_pte()
1071 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v5_2_vm_copy_pte()
1072 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v5_2_vm_copy_pte()
1073 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_2_vm_copy_pte()
1088 static void sdma_v5_2_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v5_2_vm_write_pte()  argument
1094 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v5_2_vm_write_pte()
1096 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v5_2_vm_write_pte()
1097 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_2_vm_write_pte()
1098 	ib->ptr[ib->length_dw++] = ndw - 1;  in sdma_v5_2_vm_write_pte()
1100 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v5_2_vm_write_pte()
1101 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v5_2_vm_write_pte()
1118 static void sdma_v5_2_vm_set_pte_pde(struct amdgpu_ib *ib,  in sdma_v5_2_vm_set_pte_pde()  argument
1124 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);  in sdma_v5_2_vm_set_pte_pde()
1125 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v5_2_vm_set_pte_pde()
1126 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_2_vm_set_pte_pde()
1127 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v5_2_vm_set_pte_pde()
1128 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v5_2_vm_set_pte_pde()
1129 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v5_2_vm_set_pte_pde()
1130 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v5_2_vm_set_pte_pde()
1131 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v5_2_vm_set_pte_pde()
1132 	ib->ptr[ib->length_dw++] = 0;  in sdma_v5_2_vm_set_pte_pde()
1133 	ib->ptr[ib->length_dw++] = count - 1; /* number of entries */  in sdma_v5_2_vm_set_pte_pde()
1144 static void sdma_v5_2_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v5_2_ring_pad_ib()  argument
1150 	pad_count = (-ib->length_dw) & 0x7;  in sdma_v5_2_ring_pad_ib()
1153 			ib->ptr[ib->length_dw++] =  in sdma_v5_2_ring_pad_ib()
1157 			ib->ptr[ib->length_dw++] =  in sdma_v5_2_ring_pad_ib()
1789 static void sdma_v5_2_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v5_2_emit_copy_buffer()  argument
1795 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v5_2_emit_copy_buffer()
1798 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v5_2_emit_copy_buffer()
1799 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v5_2_emit_copy_buffer()
1800 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v5_2_emit_copy_buffer()
1801 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v5_2_emit_copy_buffer()
1802 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v5_2_emit_copy_buffer()
1803 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v5_2_emit_copy_buffer()
1816 static void sdma_v5_2_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v5_2_emit_fill_buffer()  argument
1821 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v5_2_emit_fill_buffer()
1822 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v5_2_emit_fill_buffer()
1823 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v5_2_emit_fill_buffer()
1824 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v5_2_emit_fill_buffer()
1825 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v5_2_emit_fill_buffer()