321 	data = RREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL1);  in mes_v10_1_init_aggregated_doorbell()
328 	WREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL1, data);  in mes_v10_1_init_aggregated_doorbell()
330 	data = RREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL2);  in mes_v10_1_init_aggregated_doorbell()
337 	WREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL2, data);  in mes_v10_1_init_aggregated_doorbell()
339 	data = RREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL3);  in mes_v10_1_init_aggregated_doorbell()
346 	WREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL3, data);  in mes_v10_1_init_aggregated_doorbell()
348 	data = RREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL4);  in mes_v10_1_init_aggregated_doorbell()
355 	WREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL4, data);  in mes_v10_1_init_aggregated_doorbell()
357 	data = RREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL5);  in mes_v10_1_init_aggregated_doorbell()
364 	WREG32_SOC15(GC, 0, mmCP_MES_DOORBELL_CONTROL5, data);  in mes_v10_1_init_aggregated_doorbell()
367 	WREG32_SOC15(GC, 0, mmCP_HQD_GFX_CONTROL, data);  in mes_v10_1_init_aggregated_doorbell()
548 		data = RREG32_SOC15(GC, 0, mmCP_MES_CNTL);  in mes_v10_1_enable()
552 		WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data);  in mes_v10_1_enable()
561 			WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START,  in mes_v10_1_enable()
568 		data = RREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL);  in mes_v10_1_enable()
571 		WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data);  in mes_v10_1_enable()
577 		WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data);  in mes_v10_1_enable()
580 		data = RREG32_SOC15(GC, 0, mmCP_MES_CNTL);  in mes_v10_1_enable()
589 		WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data);  in mes_v10_1_enable()
615 	WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_CNTL, 0);  in mes_v10_1_load_microcode()
622 	WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START,  in mes_v10_1_load_microcode()
626 	WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_LO,  in mes_v10_1_load_microcode()
628 	WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_HI,  in mes_v10_1_load_microcode()
632 	WREG32_SOC15(GC, 0, mmCP_MES_MIBOUND_LO, 0x1FFFFF);  in mes_v10_1_load_microcode()
635 	WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_LO,  in mes_v10_1_load_microcode()
637 	WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_HI,  in mes_v10_1_load_microcode()
641 	WREG32_SOC15(GC, 0, mmCP_MES_MDBOUND_LO, 0x3FFFF);  in mes_v10_1_load_microcode()
646 		data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid);  in mes_v10_1_load_microcode()
649 		data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL);  in mes_v10_1_load_microcode()
656 		WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data);  in mes_v10_1_load_microcode()
659 		WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data);  in mes_v10_1_load_microcode()
666 		data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid);  in mes_v10_1_load_microcode()
669 		data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL);  in mes_v10_1_load_microcode()
675 		WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data);  in mes_v10_1_load_microcode()
678 		WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data);  in mes_v10_1_load_microcode()
828 	data = RREG32_SOC15(GC, 0, mmCP_HQD_VMID);
830 	WREG32_SOC15(GC, 0, mmCP_HQD_VMID, data);
833 	data = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
836 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data);
839 	WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);
840 	WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);
843 	data = RREG32_SOC15(GC, 0, mmCP_MQD_CONTROL);
845 	WREG32_SOC15(GC, 0, mmCP_MQD_CONTROL, 0);
848 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);
849 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);
852 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR,
854 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,
858 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);
861 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,
863 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
867 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
871 	WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);
874 	WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, mqd->cp_hqd_active);
1092 		tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);  in mes_v10_1_kiq_setting()
1095 		WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp);  in mes_v10_1_kiq_setting()
1097 		WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp);  in mes_v10_1_kiq_setting()
1100 		tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);  in mes_v10_1_kiq_setting()
1103 		WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);  in mes_v10_1_kiq_setting()
1105 		WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);  in mes_v10_1_kiq_setting()